Datasheet > MT89L85AN

MT89L85AN

更新时间： 2024-02-18 03:12:42

品牌	Logo	应用领域
MITEL		开关
页数	文件大小	规格书
20页	136K
描述
CMOS ST-BUS⑩ FAMILY Enhanced Digital Switch

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技术参数
数据手册

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MT89L85AN 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Obsolete	零件包装代码：	LPCC
针数：	44	Reach Compliance Code：	unknown
HTS代码：	8542.39.00.01	风险等级：	5.88
JESD-30 代码：	S-PQCC-J44	端子数量：	44
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	QCCJ
封装等效代码：	LDCC44,.7SQ	封装形状：	SQUARE
封装形式：	CHIP CARRIER	电源：	3.3 V
认证状态：	Not Qualified	子类别：	Other Telecom ICs
最大压摆率：	7 mA	标称供电电压：	3.3 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子形式：	J BEND
端子节距：	1.27 mm	端子位置：	QUAD

MT89L85AN 数据手册

Advance Information

MT89L85

circuitry the contents of the CSTo bit is output one

channel before the corresponding channel on the ST-

BUS streams. For example, the contents of CSTo bit

in position 0 (ST0, CH0) of the CMH, is transmitted

synchronously with ST-BUS channel 31, bit 7. The

contents of CSTo bit in position 32 (ST1, CH0) of the

CMH is transmitted during ST-BUS channel 31 bit 6.

Initialization of the MT89L85

On initialization or power up, the contents of the

Connection Memory High can be in any state. This

is a potentially hazardous condition when multiple

MT89L85 ST-BUS outputs are tied together to form

matrices, as these outputs may conﬂict. The ODE

pin should be held low on power up to keep all

outputs in the high impedance condition.

Bit V/C (Variable/Constant Delay) on the Connect

Memory High locations allow per-channel selection

between Variable and Constant throughput delay

capabilities.

V/C

CSTo

BIT

NAME

V/C

DESCRIPTION

Variable/Constant Throughput Delay Mode. This bit is used to select between Variable

(LOW) and Constant Delay (HIGH) modes on a per-channel basis.

Message Channel. When 1, the contents of the corresponding location in Connection

Memory Low are output on the corresponding channel and stream. When 0, the contents

of the programmed location in Connection Memory Low act as an address for the Data

Memory and so determine the source of the connection to the location’s channel and

stream.

CSTo

CSTo Bit. This bit drives a bit time on the CSTo output pin.

Output Enable. This bit enables the output drivers on a per-channel basis. This allows

individual channels on individual streams to be made high-impedance, allowing switch

matrices to be constructed. A HIGH enables the driver and a LOW disables it.

Figure 5 - Connection Memory High Bits

x = Don’t care

SAB2 SAB1 SAB0 CAB4 CAB3 CAB2 CAB1 CAB0

BIT

7-5

NAME

DESCRIPTION

SAB2-0* Source Stream Address bits. These three bits are used to select eight source streams

for the connection. Bit 7 of each word is the most signiﬁcant bit.

4-0*

CAB4-0* Source Channel Address bits 0-4. These ﬁve bits are used to select 32 different source

channels for the connection (The ST-BUS stream where the channel is present is deﬁned

by bits SAB2-0). Bit 4 is the most signiﬁcant bit.

If bit 2 of the corresponding Connection High location is 1 or if bit 6 of the Control Register is 1, then these entire 8 bits are output

on the channel and stream associated with this location. Otherwise, the bits are used as indicated to define the source of the

connection which is output on the channel and stream associated with this location.

Figure 6 - Connection Memory Low Bits

1...4 5 678 9 10...20

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与MT89L85AN相关器件

型号	品牌	描述	获取价格	数据表
MT89L85ANR	MICROSEMI	Telecom IC, CMOS, PDSO48	获取价格
MT89L85ANR1	ZARLINK	Digital Time Switch, CMOS, PDSO48, 0.300 INCH, LEAD FREE, PLASTIC, MO-118AA, SSOP-48	获取价格
MT89L85AP	MITEL	CMOS ST-BUS⑩ FAMILY Enhanced Digital Switch	获取价格
MT89L85AP1	ZARLINK	Digital Time Switch, CMOS, PQCC44, LEAD FREE, PLASTIC, MS-018AC, LCC-44	获取价格
MT89L85AP1	MICROSEMI	Digital Time Switch, CMOS, PQCC44, LEAD FREE, PLASTIC, MS-018AC, LCC-44	获取价格
MT89L85APR	MICROSEMI	Telecom IC, CMOS, PQCC44	获取价格

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