Datasheet > MT5C2564C-55/XT

MT5C2564C-55/XT

更新时间： 2024-11-06 05:50:39

品牌	Logo	应用领域
AUSTIN		存储静态存储器
页数	文件大小	规格书
12页	90K
描述
64K x 4 SRAM SRAM MEMORY ARRAY

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中文翻译

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数据手册

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MT5C2564C-55/XT 数据手册

SRAM

MT5C2564

Austin Semiconductor, Inc.

64K x 4 SRAM

SRAM MEMORY ARRAY

PIN ASSIGNMENT

(Top View)

AVAILABLE AS MILITARY

SPECIFICATIONS

• SMD 5962-88681

• SMD 5962-88545

• MIL-STD-883

24-Pin DIP (C)

(300 MIL)

28-Pin LCC (EC)

2 1 28 27

FEATURES

Vcc

2 6

2 5

2 4

2 3

2 2

2 1

2 0

1 9

1 8

A15

A14

A13

A12

A11

A10

DQ4

DQ3

DQ2

A15

A14

A13

A12

A11

A10

DQ4

DQ3

DQ2

DQ1

WE\

A8 1 0

A9 1 1

CE\ 1 2

• High Speed: 15, 20, 25, 35, 45, 55, and 70

• Battery Backup: 2V data retention

• Low power standby

• High-performance, low-power, CMOS double-metal

process

• Single +5V (+10%) Power Supply

• Easy memory expansion with CE\

• All inputs and outputs are TTL compatible

A9 10

CE\ 11

Vss 12

13 14 15 16 17

28-Pin Flat Pack (F)

OPTIONS

• Timing

MARKING

2 8

2 7

2 6

2 5

2 4

2 3

2 2

2 1

2 0

1 9

1 8

1 7

1 6

1 5

CE\

Vss

Vcc

A15

A14

A13

A12

A11

A10

15ns access

20ns access

25ns access

35ns access

45ns access

55ns access

70ns access

-15

-20

-25

-35

-45

-55*

-70*

1 0

1 1

1 2

1 3

1 4

DQ3

DQ2

DQ1

DQ0

WE\

• Package(s)

Ceramic DIP (300 mil)

CeramicLCC

Ceramic Flatpack

No. 106

No. 204

GENERAL DESCRIPTION

• OperatingTemperature Ranges

Industrial (-40^oC to +85^oC)

Military (-55^oC to +125^oC)

The Austin Semiconductor SRAM family employs

high-speed, low-power CMOS and are fabricated using double-

layer metal, double-layer polysilicon technology.

For flexibility in high-speed memory applications,

Austin Semiconductor offers chip enable (CE\) on all

organizations. This enhancement can place the outputs in

High-Z for additional flexibility in system design. The x4

configuration features common data input and output.

Writing to these devices is accomplished when write

enable (WE\) and CE\ inputs are both LOW. Reading is

accomplished when WE\ remains HIGH and CE\ goes LOW.

The device offers a reduced power standby mode when

disabled. This allows system designs to achieve low standby

power requirements.

• 2V data retention/low power

*Electrical characteristics identical to those provided for the 45ns

access devices.

For more products and information

please visit our web site at

www.austinsemiconductor.com

These devices operate from a single +5V power

supply and all inputs and outputs are fully TTL compatible.

Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.

MT5C2564

Rev. 3.1 6/05

12 3 4 5 6 7...12

中文翻译

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与MT5C2564C-55/XT相关器件

型号	品牌	获取价格	描述	数据表
MT5C2564C-55L/883C	AUSTIN	获取价格	64K x 4 SRAM SRAM MEMORY ARRAY
MT5C2564C-55L/883C	MICROSS	获取价格	Standard SRAM, 64KX4, 55ns, CMOS, CDIP24, 0.300 INCH, CERAMIC, DIP-24
MT5C2564C-55L/IT	AUSTIN	获取价格	64K x 4 SRAM SRAM MEMORY ARRAY
MT5C2564C-55L/IT	MICROSS	获取价格	Standard SRAM, 64KX4, 55ns, CMOS, CDIP24, 0.300 INCH, CERAMIC, DIP-24
MT5C2564C-55L/XT	AUSTIN	获取价格	64K x 4 SRAM SRAM MEMORY ARRAY
MT5C2564C-55L/XT	MICROSS	获取价格	Standard SRAM, 64KX4, 55ns, CMOS, CDIP24, 0.300 INCH, CERAMIC, DIP-24
MT5C2564C-55P/883C	MICROSS	获取价格	Standard SRAM, 64KX4, 55ns, CMOS, CDIP24, 0.300 INCH, CERAMIC, DIP-24
MT5C2564C-70	AUSTIN	获取价格	SRAM
MT5C2564C-70/883C	AUSTIN	获取价格	SRAM
MT5C2564C-70/883C	MICROSS	获取价格	Standard SRAM, 64KX4, 70ns, CMOS, CDIP24, 0.300 INCH, CERAMIC, DIP-24

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