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MT5C1001F-40/IT PDF预览

MT5C1001F-40/IT

更新时间： 2024-11-08 05:50:39
品牌 Logo 应用领域
AUSTIN 存储静态存储器
页数 文件大小 规格书
13页 95K
描述
1M x 1 SRAM SRAM MEMORY ARRAY

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中文翻译

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MT5C1001F-40/IT 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：DFP包装说明：SOF,
针数：32Reach Compliance Code：unknown
ECCN代码：EAR99HTS代码：8542.32.00.41
风险等级：5.41JESD-30 代码：R-CDSO-F32
JESD-609代码：e0长度：20.828 mm
内存密度：1048576 bit内存集成电路类型：STANDARD SRAM
内存宽度：1功能数量：1
端子数量：32字数：1048576 words
字数代码：1000000工作模式：ASYNCHRONOUS
最高工作温度：85 °C最低工作温度：-40 °C
组织：1MX1封装主体材料：CERAMIC, METAL-SEALED COFIRED
封装代码：SOF封装形状：RECTANGULAR
封装形式：SMALL OUTLINE并行/串行：PARALLEL
峰值回流温度（摄氏度）：NOT SPECIFIED认证状态：Not Qualified
座面最大高度：2.9718 mm最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：TIN LEAD
端子形式：FLAT端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：10.414 mmBase Number Matches：1

MT5C1001F-40/IT 数据手册

 浏览型号MT5C1001F-40/IT的Datasheet PDF文件第2页浏览型号MT5C1001F-40/IT的Datasheet PDF文件第3页浏览型号MT5C1001F-40/IT的Datasheet PDF文件第4页浏览型号MT5C1001F-40/IT的Datasheet PDF文件第5页浏览型号MT5C1001F-40/IT的Datasheet PDF文件第6页浏览型号MT5C1001F-40/IT的Datasheet PDF文件第7页 
SRAM  
MT5C1001  
Limited Availability  
Austin Semiconductor, Inc.  
1M x 1 SRAM  
SRAM MEMORY ARRAY  
PIN ASSIGNMENT  
(Top View)  
32-Pin LCC (EC)  
32-Pin SOJ (DCJ)  
AVAILABLE AS MILITARY  
28-Pin DIP (C)  
(400 MIL)  
SPECIFICATIONS  
• SMD 5962-92316  
• MIL-STD-883  
A10  
A11  
A12  
NC  
A13  
A14  
A15  
NC  
A16  
A17  
A18  
A19  
NC  
1
2
3
4
5
6
7
8
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
Vcc  
NC  
A9  
A8  
A7  
A6  
A5  
A4  
A3  
NC  
A2  
NC  
A1  
A0  
D
A10  
A11  
A12  
A13  
A14  
A15  
NC  
1
2
3
4
5
6
7
8
9
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
Vcc  
A9  
A8  
A7  
A6  
A5  
A4  
NC  
A3  
A2  
A1  
A0  
D
FEATURES  
• High Speed: 20, 25, 35, and 45  
• Battery Backup: 2V data retention  
• Low power standby  
• Single +5V (+10%) Power Supply  
• Easy memory expansion with CE\ and OE\ options.  
• All inputs and outputs are TTL compatible  
• Three-state output  
9
A16  
A17  
10  
11  
12  
13  
14  
15  
16  
A18 10  
A19 11  
Q
12  
Q
WE\  
Vss  
WE\ 13  
Vss 14  
CE\  
CE\  
32-Pin Flat Pack (F)  
OPTIONS  
• Timing  
MARKING  
1
A10  
Vcc  
NC  
A9  
A8  
A7  
A6  
A5  
A4  
A3  
NC  
A2  
NC  
A1  
A0  
D
3 2  
2
A11  
A12  
NC  
A13  
A14  
A15  
NC  
A16  
A17  
A18  
A19  
NC  
3 1  
3
3 0  
20ns access  
25ns access  
35ns access  
45ns access  
55ns access  
70ns access  
-20  
4
2 9  
5
2 8  
-25  
-35  
-45  
-55*  
-70*  
6
2 7  
7
2 6  
8
2 5  
9
2 4  
1 0  
1 1  
1 2  
1 3  
1 4  
1 5  
1 6  
2 3  
2 2  
2 1  
2 0  
1 9  
1 8  
1 7  
Q
WE\  
Vss  
• Package(s)  
CE\  
Ceramic DIP (400 mil)  
CeramicLCC  
Ceramic Flatpack  
Ceramic SOJ  
C
EC  
F
No. 109  
No. 207  
No. 303  
No. 501  
GENERAL DESCRIPTION  
DCJ  
The MT5C1001 employs low power, high-performance  
silicon-gate CMOS technology. Static design eliminates the  
need for external clocks or timing strobes while CMOS circuitry  
reduces power consumption and provides for greater  
reliability.  
• OperatingTemperature Ranges  
Industrial (-40oC to +85oC)  
Military (-55oC to +125oC)  
IT  
XT  
For flexibility in high-speed memory applications, ASI  
offers chip enable (CE\) and output enable (OE\) capability.  
These enhancements can place the outputs in High-Z for addi-  
tional flexibility in system design. Writing to these devices is  
accomplished when write enable (WE|) and CE\ inputs are both  
LOW. Reading is accomplished when WE\ remains HIGH while  
CE\ and OE\ go LOW. The devices offer a reduced power  
standby mode when disabled. This allows system designs to  
achieve low standby power requirements.  
• 2V data retention/low power  
L
*Electrical characteristics identical to those provided for the  
45ns access devices.  
For more products and information  
please visit our web site at  
The “L” version provides an approximate 50 percent  
www.austinsemiconductor.com  
reduction in CMOS standby current (ISBC2) over the standard  
version.  
All devices operation from a single +5V power supply  
and all inputs and outputs are fully TTL compatible.  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
MT5C1001  
Rev. 2.1 06/05  
1
1234567...13

中文翻译

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与MT5C1001F-40/IT相关器件

型号 品牌 获取价格 描述 数据表
MT5C1001F-40/XT AUSTIN

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 		1M x 1 SRAM SRAM MEMORY ARRAY
MT5C1001F-40/XT MICROSS

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 		Standard SRAM, 1MX1, CMOS, CDFP32, CERAMIC, FP-32
MT5C1001F-40L/883C AUSTIN

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 		1M x 1 SRAM SRAM MEMORY ARRAY
MT5C1001F-40L/IT AUSTIN

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 		1M x 1 SRAM SRAM MEMORY ARRAY
MT5C1001F-40L/XT AUSTIN

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 		1M x 1 SRAM SRAM MEMORY ARRAY
MT5C1001F-45/883C AUSTIN

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 		1M x 1 SRAM SRAM MEMORY ARRAY
MT5C1001F-45/883C MICROSS

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 		Standard SRAM, 1MX1, 45ns, CMOS, CDFP32, CERAMIC, DFP-32
MT5C1001F-45/IT MICROSS

获取价格

 		Standard SRAM, 1MX1, 45ns, CMOS, CDFP32, CERAMIC, DFP-32
MT5C1001F-45/XT MICROSS

获取价格

 		Standard SRAM, 1MX1, 45ns, CMOS, CDFP32, CERAMIC, DFP-32
MT5C1001F-45E/883C MICROSS

获取价格

 		Standard SRAM, 1MX1, 45ns, CMOS, CDFP32, CERAMIC, FP-32

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