Datasheet > MT58L128L18PT-7.5T

MT58L128L18PT-7.5T

更新时间： 2023-02-15 00:00:00

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		静态存储器
页数	文件大小	规格书
17页	306K
描述
Standard SRAM, 128KX18, 4ns, CMOS, PQFP100, PLASTIC, MS-026, TQFP-100

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MT58L128L18PT-7.5T 数据手册

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2Mb: 128K x 18, 64K x 32/36

PIPELINED, SCD SYNCBURST SRAM

FUNCTIONAL BLOCK DIAGRAM

128K x 18

ADDRESS

SA0, SA1, SA

MODE

SA0-SA1

SA1'

ADV#

CLK

BINARY

COUNTER AND

LOGIC

SA0'

CLR

ADSC#

ADSP#

BYTE “b”

WRITE REGISTER

WRITE DRIVER

OUTPUT

BUFFERS

BWb#

DQs

DQPa

DQPb

128K x 9 x 2

MEMORY

ARRAY

OUTPUT

REGISTERS

SENSE

AMPS

BYTE “a”

WRITE REGISTER

WRITE DRIVER

BWa#

BWE#

INPUT

REGISTERS

GW#

ENABLE

CE#

CE2

PIPELINED

ENABLE

CE2#

OE#

FUNCTIONAL BLOCK DIAGRAM

64K x 32/36

ADDRESS

SA0, SA1, SA

SA0-SA1

MODE

SA1'

ADV#

CLK

BINARY

COUNTER

CLR

SA0'

ADSC#

ADSP#

BYTE “d”

WRITE DRIVER

BYTE “d”

WRITE REGISTER

BWd#

BWc#

64K x 8 x 4

(x32)

BYTE “c”

WRITE DRIVER

BYTE “c”

WRITE REGISTER

OUTPUT

BUFFERS

OUTPUT

REGISTERS

64K x 9 x 4

(x36)

SENSE

AMPS

DQs

BYTE “b”

WRITE DRIVER

MEMORY

ARRAY

BYTE “b”

WRITE REGISTER

BWb#

BYTE “a”

WRITE DRIVER

BYTE “a”

WRITE REGISTER

BWa#

BWE#

INPUT

REGISTERS

GW#

CE#

CE2

ENABLE

PIPELINED

ENABLE

CE2#

OE#

NOTE: Functional Block Diagrams illustrate simplified device operation. See Truth Table, Pin Descriptions and timing

diagrams for detailed information.

2Mb: 128K x 18, 64K x 32/36 Pipelined, SCD SyncBurst SRAM

MT58L128L18P.p65 – Rev. 7/99

Micron Technology, Inc., reserves the right to change products or specifications without notice.

1999, Micron Technology, Inc.

123 4 5 6 7...17

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