Datasheet > MT58L128L18DT-10IT

MT58L128L18DT-10IT

更新时间： 2024-02-22 13:08:36

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		静态存储器内存集成电路
页数	文件大小	规格书
17页	308K
描述
Cache SRAM, 128KX18, 5ns, CMOS, PQFP100, PLASTIC, MS-026BHA, TQFP-100

阅读下载

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

MT58L128L18DT-10IT 技术参数

生命周期：	Obsolete	零件包装代码：	QFP
包装说明：	LQFP,	针数：	100
Reach Compliance Code：	unknown	ECCN代码：	3A991.B.2.A
HTS代码：	8542.32.00.41	风险等级：	5.45
最长访问时间：	5 ns	JESD-30 代码：	R-PQFP-G100
长度：	20 mm	内存密度：	2359296 bit
内存集成电路类型：	CACHE SRAM	内存宽度：	18
功能数量：	1	端子数量：	100
字数：	131072 words	字数代码：	128000
工作模式：	SYNCHRONOUS	最高工作温度：	85 °C
最低工作温度：	-40 °C	组织：	128KX18
封装主体材料：	PLASTIC/EPOXY	封装代码：	LQFP
封装形状：	RECTANGULAR	封装形式：	FLATPACK, LOW PROFILE
并行/串行：	PARALLEL	认证状态：	Not Qualified
座面最大高度：	1.6 mm	最大供电电压 (Vsup)：	3.6 V
最小供电电压 (Vsup)：	3.135 V	标称供电电压 (Vsup)：	3.3 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子形式：	GULL WING
端子节距：	0.65 mm	端子位置：	QUAD
宽度：	14 mm	Base Number Matches：	1

MT58L128L18DT-10IT 数据手册

浏览型号MT58L128L18DT-10IT的Datasheet PDF文件第3页

浏览型号MT58L128L18DT-10IT的Datasheet PDF文件第4页

浏览型号MT58L128L18DT-10IT的Datasheet PDF文件第5页

浏览型号MT58L128L18DT-10IT的Datasheet PDF文件第7页

浏览型号MT58L128L18DT-10IT的Datasheet PDF文件第8页

浏览型号MT58L128L18DT-10IT的Datasheet PDF文件第9页

2Mb: 128K x 18, 64K x 32/36

PIPELINED, DCD SYNCBURST SRAM

TQFP PIN DESCRIPTIONS (continued)

x18

x32/x36

SYMBOL

TYPE

DESCRIPTION

ADSP#

Input Synchronous Address Status Processor: This active LOW input

interrupts any ongoing burst, causing a new external address to be

registered. A READ is performed using the new address,

independent of the byte write enables and ADSC#, but dependent

upon CE#, CE2 and CE2#. ADSP# is ignored if CE# is HIGH. Power-

down state is entered if CE2 is LOW or CE2# is HIGH.

ADSC#

MODE

Input Synchronous Address Status Controller: This active LOW input

interrupts any ongoing burst, causing a new external address to be

registered. A READ or WRITE is performed using the new address if

CE# is LOW. ADSC# is also used to place the chip into power-down

state when CE# is HIGH.

Input Mode: This input selects the burst sequence. A LOW on this pin

selects “linear burst.” NC or HIGH on this pin selects “interleaved

burst.” Do not alter input state while device is operating.

(a) 58, 59,

62, 63, 68, 69, 56-59, 62, 63

72, 73

(a) 52, 53,

DQa

DQb

Input/ SRAM Data I/Os: For the x18 version, Byte “a” is DQa pins; Byte “b”

Output is DQb pins. For the x32 and x36 versions, Byte “a” is DQa pins;

Byte “b” is DQb pins; Byte “c” is DQc pins; Byte “d” is DQd pins. Input

data must meet setup and hold times around the rising edge of CLK.

(b) 8, 9, 12,

(b) 68, 69,

13, 18, 19, 72-75, 78, 79

22, 23

12, 13

(d) 18, 19,

DQc

DQd

22-25, 28, 29

–

NC/DQPa NC/ No Connect/Parity Data I/Os: On the x32 version, these pins are No

NC/DQPb

NC/DQPc

NC/DQPd

I/O

Connect (NC). On the x18 version, Byte “a” parity is DQPa; Byte “b”

parity is DQPb. On the x36 version, Byte “a” parity is DQPa; Byte “b”

parity is DQPb; Byte “c” parity is DQPc; Byte “d” parity is DQPd.

–

14, 15, 41, 65, 14, 15, 41, 65,

91 91

VDD

V^DDQ

VSS

Supply Power Supply: See DC Electrical Characteristics and Operating

Conditions for range.

4, 11, 20, 27, 4, 11, 20, 27,

54, 61, 70, 77 54, 61, 70, 77

Supply Isolated Output Buffer Supply: See DC Electrical Characteristics and

Operating Conditions for range.

5, 10, 17, 21, 5, 10, 17, 21,

26, 40, 55, 60, 26, 40, 55, 60,

67, 71, 76, 90 67, 71, 76, 90

Supply Ground: GND.

38, 39, 42, 43 38, 39, 42, 43

DNU

–

Do Not Use: These signals may either be unconnected or wired to

GND to improve package heat dissipation.

1-3, 6, 7, 16,

25, 28-30,

16, 66

No Connect: These signals are not internally connected and may be

connected to ground to improve package heat dissipation.

51-53, 56, 57,

66, 75, 78, 79,

95, 96

NC/SA

–

No Connect: This pin is reserved for address expansion.

2Mb: 128K x 18, 64K x 32/36 Pipelined, DCD SyncBurst SRAM

MT58L128L18D.p65 – Rev. 9/99

Micron Technology, Inc., reserves the right to change products or specifications without notice.

1999, Micron Technology, Inc.

1...3 4 567 8 9...17

下载PDF

与MT58L128L18DT-10IT相关器件

型号	品牌	描述	获取价格	数据表
MT58L128L18DT-10T	CYPRESS	Cache SRAM, 128KX18, 5ns, CMOS, PQFP100, PLASTIC, MS-026, TQFP-100	获取价格
MT58L128L18DT-6IT	CYPRESS	Cache SRAM, 128KX18, 3.5ns, CMOS, PQFP100, PLASTIC, MS-026BHA, TQFP-100	获取价格
MT58L128L18DT-6T	CYPRESS	Standard SRAM, 128KX18, 3.5ns, CMOS, PQFP100, PLASTIC, MS-026, TQFP-100	获取价格
MT58L128L18DT-7.5IT	CYPRESS	Cache SRAM, 128KX18, 4ns, CMOS, PQFP100, PLASTIC, MS-026BHA, TQFP-100	获取价格
MT58L128L18DT-7.5T	CYPRESS	Standard SRAM, 128KX18, 4ns, CMOS, PQFP100, PLASTIC, MS-026, TQFP-100	获取价格
MT58L128L18F	MICRON	2Mb: 128K x 18, 64K x 32/36 FLOW-THROUGH SYNCBURST SRAM	获取价格

产品中心

服务支持

精选活动

关于我们

帮助中心

MT58L128L18DT-10IT

MT58L128L18DT-10IT 技术参数

MT58L128L18DT-10IT 数据手册

与MT58L128L18DT-10IT相关器件

与MT58L128L18DT-10IT相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

MT58L128L18DT-10IT

MT58L128L18DT-10IT 技术参数

MT58L128L18DT-10IT 数据手册

与MT58L128L18DT-10IT相关器件

与MT58L128L18DT-10IT相关文章

您还可以找

您在本页遇到什么问题？