1Gb : x4, x8, x16 DDR3 SDRAM
Fe a t u re s
DDR3 SDRAM
MT41J256M4 – 32 Me g x 4 x 8 Ba n ks
MT41J128M8 – 16 Me g x 8 x 8 Ba n ks
MT41J64M16 – 8 Me g x 16 x 8 Ba n ks
Op t io n s
Ma rkin g
Fe a t u re s
• VDD = VDDQ = +1.5V ±0.075V
• Configuration
– 256 Meg x 4
– 128 Meg x 8
– 64 Meg x 16
• 1.5V center-terminated push/ pull I/ O
• Differential bidirectional data strobe
• 8n-bit prefetch architecture
256M4
128M8
64M16
• Differential clock inputs (CK, CK#)
• 8 internal banks
• Nominal and dynamic on-die termination (ODT) for
data, strobe, and mask signals
• CAS (READ) latency (CL): 5, 6, 7, 8, 9, 10, or 11
• POSTED CAS ADDITIVE latency (AL): 0, CL - 1, CL - 2
• CAS (WRITE) latency (CWL): 5, 6, 7, 8, based on CK
• FBGA package (Pb-free) - x4, x8
– 78-ball FBGA (8mm x 11.5mm) Rev. F
– 78-ball FBGA (9mm x 11.5mm) Rev. D
– 86-ball FBGA (9mm x 15.5mm) Rev. B
• FBGA package (Pb-free) - x16
– 96-ball FBGA (9mm x 15.5mm) Rev. B
• Timing - cycle time
JP
HX
BY
LA
t
• Fixed burst length (BL) of 8 and burst chop (BC) of 4
(via the mode register set [MRS])
– 1.25ns @ CL = 11 (DDR3-1600)
– 1.25ns @ CL = 10 (DDR3-1600)
– 1.25ns @ CL = 9 (DDR3-1600)
– 1.5ns @ CL = 10 (DDR3-1333)
– 1.5ns @ CL = 9 (DDR3-1333)
– 1.5ns @ CL = 8 (DDR3-1333)
– 1.87ns @ CL = 8 (DDR3-1066)
– 1.87ns @ CL = 7 (DDR3-1066)
– 2.5ns @ CL = 6 (DDR3-800)
– 2.5ns @ CL = 5 (DDR3-800)
• Revision
-125
-125E
-125F
-15
-15E
-15F
-187
-187E
-25
-25E
:B/ :D/ :F
• Selectable BC4 or BL8 on-the-fly (OTF)
• Self refresh mode
o
o
• T of 0 C to 95 C
C
o
o
– 64ms, 8,192 cycle refresh at 0 C to 85 C
– 32ms at 85 C to 95 C
o
o
• Clock frequency range of 300–800 MHz
• Self refresh temperature (SRT)
• Autom atic self refresh (ASR)
• Write leveling
• Multipurpose register
• Output driver calibration
Ta b le 1:
Ke y Tim in g Pa ra m e t e rs
Sp e e d Gra d e
-125
Da t a Ra t e (MT/s)
Ta rg e t t RCD-t RP-CL
t RCD (n s)
t RP (n s)
CL (n s)
1600
1600
1600
1333
1333
1333
1066
1066
800
11-11-11
10-10-10
9-9-9
13.75
12.5
11.25
15
13.75
12.5
11.25
15
13.75
12.5
11.25
15
-125E
-125F
-15
10-10-10
9-9-9
-15E
-15F
-187
-187E
-25
13.5
12
13.5
12
13.5
12
8-8-8
8-8-8
15
15
15
7-7-7
13.1
15
13.1
15
13.1
15
6-6-6
-25E
800
5-5-5
12.5
12.5
12.5
PDF: 09005aef826aa906/Source: 09005aef82a357c3
1Gb_DDR3_D1 .fm - Rev. D 8/1/08 EN
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2006 Micron Technology, Inc. All rights reserved.
1
Products and specifications discussed herein are subject to change by Micron without notice.