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MSM51V8221A-30GS-K PDF预览

MSM51V8221A-30GS-K

更新时间: 2024-11-26 19:38:03
品牌 Logo 应用领域
冲电气 - OKI 光电二极管内存集成电路
页数 文件大小 规格书
17页 200K
描述
Memory Circuit, 256KX8, CMOS, PDSO28, 0.430 INCH, 1.27 MM PITCH, PLASTIC, SOP-28

MSM51V8221A-30GS-K 技术参数

生命周期:Transferred零件包装代码:SOIC
包装说明:SOP,针数:28
Reach Compliance Code:unknownHTS代码:8542.32.00.71
风险等级:5.26JESD-30 代码:R-PDSO-G28
长度:18.5 mm内存密度:2097152 bit
内存集成电路类型:MEMORY CIRCUIT内存宽度:8
功能数量:1端子数量:28
字数:262144 words字数代码:256000
工作模式:SYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:256KX8
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
认证状态:Not Qualified座面最大高度:2.5 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL宽度:8.8 mm
Base Number Matches:1

MSM51V8221A-30GS-K 数据手册

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E2L0054-28-Z2  
This version: Dec. 1998  
Previous version: Mar. 1998  
¡ Semiconductor  
MSM51V8221A  
262,214-Word ¥ 8-Bit Field Memory  
DESCRIPTION  
TheOKIMSM51V8221Aisahighperformance2-Mbit, 256K¥8-bit, FieldMemory. Itisdesigned  
for high-speed serial access applications such as HDTVs, conventional NTSC TVs, VTRs, digital  
movies and Multi-media systems. It is a FRAM for wide or low end use as general commodity  
TVs and VTRs, exclusively. The MSM51V8221A is not designed for the other use or high end  
use in medical systems, professional graphics systems which require long term picture, and  
data storage systems and others. The 2-Mbit capacity fits one field of a conventional NTSC TV  
screen.  
Each of the 8-bit planes has separate serial write and read ports. These employ independent control  
clockstosupportasynchronousreadandwriteoperations. Differentclockratesarealsosupported,  
which allow alternate data rates between write and read data streams.  
The MSM51V8221A provides high speed FIFO, First-In First-Out, operation without external  
refreshing: it refreshes its DRAM storage cells automatically, so that it appears fully static to the users.  
Moreover, fully static type memory cells and decoders for serial access enable the refresh free serial  
access operation, so that serial read and/or write control clock can be halted high or low for any  
duration as long as the power is on. Internal conflicts of memory access and refreshing operations  
are prevented by special arbitration logic.  
TheMSM51V8221A'sfunctionissimple,andsimilartoadigitaldelaydevicewhosedelay-bit-length  
is easily set by reset timing. The delay length, and the number of read delay clocks between write  
and read, is determined by externally controlled write and read reset timings.  
AdditionalSRAMserialregisters, orlinebuffersfortheinitialaccessof256¥8-bitenablehighspeed  
first-bit-access with no clock delay just after the write or read reset timings.  
The MSM51V8221A is similar in operation and functionality to OKI 1-Mbit Field Memory  
MSM51V4221C. It has a write mask function or input enable function (IE), and read-data skipping  
function or output enable function (OE). The differences between write enable (WE) and input  
enable(IE),andbetweenreadenable(RE)andoutputenable(OE)arethatWEandREcanstopserial  
write/readaddressincrements,butIEandOEcannotstoptheincrement,whenwrite/readclocking  
is continuously applied to MSM51V8221A. The input enable (IE) function allows the user to write  
intoselectedlocationsofthememoryonly,leavingtherestofthememorycontentsunchanged. This  
facilitates data processing to display a "picture in picture" on a TV screen.  
1/16  

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