Datasheet > MSC8256TAG1000B

MSC8256TAG1000B

更新时间： 2024-11-30 19:43:27

品牌	Logo	应用领域
恩智浦 - NXP		外围集成电路
页数	文件大小	规格书
70页	868K
描述
OTHER DSP, PBGA783, 29 X 29 MM, LEAD FREE, PLASTIC, FCBGA-783

阅读下载

中文翻译

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

MSC8256TAG1000B 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Transferred	包装说明：	29 X 29 MM, LEAD FREE, PLASTIC, FCBGA-783
Reach Compliance Code：	compliant	ECCN代码：	3A991.A.1
HTS代码：	8542.31.00.01	风险等级：	5.75
桶式移位器：	NO	位大小：	32
边界扫描：	YES	格式：	FIXED POINT
内部总线架构：	SINGLE	JESD-30 代码：	S-PBGA-B783
JESD-609代码：	e1	长度：	29 mm
低功率模式：	YES	湿度敏感等级：	3
端子数量：	783	封装主体材料：	PLASTIC/EPOXY
封装代码：	BGA	封装等效代码：	BGA783,28X28,40
封装形状：	SQUARE	封装形式：	GRID ARRAY
峰值回流温度（摄氏度）：	245	电源：	1,1.5/1.8,2.5 V
认证状态：	Not Qualified	RAM（字数）：	8192
座面最大高度：	3.94 mm	子类别：	Digital Signal Processors
最大供电电压：	1.05 V	最小供电电压：	0.97 V
标称供电电压：	1 V	表面贴装：	YES
技术：	CMOS	端子面层：	Tin/Silver/Copper (Sn/Ag/Cu)
端子形式：	BALL	端子节距：	1 mm
端子位置：	BOTTOM	处于峰值回流温度下的最长时间：	30
宽度：	29 mm	uPs/uCs/外围集成电路类型：	DIGITAL SIGNAL PROCESSOR, OTHER
Base Number Matches：	1

MSC8256TAG1000B 数据手册

Document Number: MSC8256

Rev. 6, 7/2013

Freescale Semiconductor

Data Sheet

MSC8256

Six-Core Digital Signal

Processor

FC-PBGA–783

29 mm × 29 mm

•

Six StarCore SC3850 DSP subsystems, each with an SC3850

DSP core, 32 Kbyte L1 instruction cache, 32 Kbyte L1 data cache,

unified 512 Kbyte L2 cache configurable as M2 memory in

64 Kbyte increments, memory management unit (MMU),

extended programmable interrupt controller (EPIC), two

general-purpose 32-bit timers, debug and profiling support,

low-power Wait, Stop, and power-down processing modes, and

ECC/EDC support.

Chip-level arbitration and switching system (CLASS) that

provides full fabric non-blocking arbitration between the cores

and other initiators and the M2 memory, shared M3 memory,

DDR SRAM controllers, device configuration control and status

registers, and other targets.

•

High-speed serial interface that supports two Serial RapidIO

interfaces, one PCI Express interface, and two SGMII interfaces

(multiplexed). The Serial RapidIO interfaces support 1x/4x

operation up to 3.125 Gbaud with a single messaging unit and two

DMA units. The PCI Express controller supports 32- and 64-bit

addressing, x4, x2, and x1 link.

QUICC Engine technology subsystem with dual RISC

processors, 48 Kbyte multi-master RAM, 48 Kbyte instruction

RAM, supporting two communication controllers for two Gigabit

Ethernet interfaces (RGMII or SGMII), to offload scheduling

tasks from the DSP cores, and an SPI.

I/O Interrupt Concentrator consolidates all chip maskable

interrupt and non-maskable interrupt sources and routes then to

INT_OUT, NMI_OUT, and the cores.

UART that permits full-duplex operation with a bit rate of up to

6.25 Mbps.

•

1056 Kbyte 128-bit wide M3 memory, 1024 Kbytes of which can

be turned off to save power.

96 Kbyte boot ROM.

•

Three input clocks (one global and two differential).

Five PLLs (three global and two Serial RapidIO PLLs).

Two DDR controllers with up to a 400 MHz clock (800 MHz data

rate), 64/32 bit data bus, supporting up to a total 2 Gbyte in up to

four banks (two per controller) and support for DDR2 and DDR3.

DMA controller with 32 unidirectional channels supporting 16

memory-to-memory channels with up to 1024 buffer descriptors

per channel, and programmable priority, buffer, and multiplexing

configuration. It is optimized for DDR SDRAM.

Up to four independent TDM modules with programmable word

size (2, 4, 8, or 16-bit), hardware-base A-law/μ-law conversion,

up to 62.5 Mbps data rate for each TDM link, and with glueless

interface to E1 or T1 framers that can interface with

H-MVIP/H.110 devices, TSI, and codecs such as AC-97.

Two general-purpose 32-bit timers for RTOS support per SC3850

core, four timer modules with four 16-bit fully programmable

timers, and eight software watchdog timers (SWT).

Eight programmable hardware semaphores.

•

Up to 32 virtual interrupts and a virtual NMI asserted by simple

write access.

•

I²C interface.

Up to 32 GPIO ports, sixteen of which can be configured as

external interrupts.

•

Boot interface options include Ethernet, Serial RapidIO interface,

I²C, and SPI.

•

Supports standard JTAG interface

Low power CMOS design, with low-power standby and

power-down modes, and optimized power-management circuitry.

45 nm SOI CMOS technology.

•

12 3 4 5 6 7...70

中文翻译

下载PDF

与MSC8256TAG1000B相关器件

型号	品牌	获取价格	描述	数据表
MSC8256TVT1000B	FREESCALE	获取价格	Six-Core Digital Signal Processor
MSC8256TVT800B	FREESCALE	获取价格	Six-Core Digital Signal Processor
MSC83301	STMICROELECTRONICS	获取价格	RF & MICROWAVE TRANSISTORS GENERAL PURPOSE AMPLIFIER APPLICATIONS
MSC83303	STMICROELECTRONICS	获取价格	RF & MICROWAVE TRANSISTORS GENERAL PURPOSE AMPLIFIER APPLICATIONS
MSC83305	STMICROELECTRONICS	获取价格	RF & MICROWAVE TRANSISTORS GENERAL PURPOSE AMPLIFIER APPLICATIONS
MSC85623	ASI	获取价格	NPN RF TRANSISTOR
MSC-9S	ARCH	获取价格	AC-DC Medical
MSC-9S-E1	ARCH	获取价格	AC-DC Medical
MSCA-0100	ASTRODYNE	获取价格	10W Ultraminiature Modular Switching Power Supplies
MSCA-0100DRL	ASTRODYNE	获取价格	10W Ultraminiature Modular Switching Power Supplies

与MSC8256TAG1000B相关文章

解析光耦仿真器：升级光耦合器技术的必要性
2024-11-18

52
英伟达新一代Blackwell GPU过热问题致交付延迟
2024-11-18

41
国产厂商思特威CMOS图像传感器芯片单月出货超1亿颗，技术创新引领行业发展
2024-11-14

69
台积电5nm和3nm产能利用率达100%，半导体行业景气度持续攀升
2024-11-14

65

产品中心

服务支持

精选活动

关于我们

帮助中心

MSC8256TAG1000B

MSC8256TAG1000B 技术参数

MSC8256TAG1000B 数据手册

与MSC8256TAG1000B相关器件

与MSC8256TAG1000B相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

MSC8256TAG1000B

MSC8256TAG1000B 技术参数

MSC8256TAG1000B 数据手册

与MSC8256TAG1000B相关器件

与MSC8256TAG1000B相关文章

您还可以找

您在本页遇到什么问题？