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MS82V48540 PDF预览

MS82V48540

更新时间: 2024-09-30 10:46:19
品牌 Logo 应用领域
冲电气 - OKI 先进先出芯片
页数 文件大小 规格书
44页 1411K
描述
393,216-Word × 32-Bit × 4-Bank FIFO-SGRAM

MS82V48540 数据手册

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FEDS82V48540-01  
Issue Date:Nov. 8, 2002  
OKI Semiconductor  
MS82V48540  
393,216-Word × 32-Bit × 4-Bank FIFO-SGRAM  
GENERAL DESCRIPTION  
The MS82V48540 is a 48-Mbit system clock synchronous dynamic random access memory. In addition to the  
conventional random read/write access function, the MS82V48540 provides the automatic row address increment  
function and automatic bank switching function. Therefore, if once the row and column addresses are set,  
continuous serial accesses are possible while banks are automatically switched till input of the Precharge  
command. The MS82V48540 is ideal for digital camera and TV buffer memory applications.  
FEATURES  
• 393,216 words × 32 bits × 4 banks memory (1,536 rows × 256 columns × 32 bits × 4 banks)  
• Single 3.3 V ±0.3 V power supply  
• LVTTL compatible inputs and outputs  
• Programmable burst length (1, 2, 4, 8 and full page)  
• Programmable CAS latency (2, 3)  
• Automatic row address increment function and automatic bank switching function  
• Power Down operation and Clock Suspend operation  
• 3,072 refresh cycles/64 ms  
• Auto refresh and self refresh capability  
• Package:  
86-pin 400 mil plastic TSOP (II) (TSOPII86-P-400-0.50-K) (Product : MS82V48540-xTA)  
x indicates speed rank.  
PRODUCT FAMILY  
Family  
MS82V48540-7  
MS82V48540-8  
Max. Operating Frequency  
143 MHz  
Access Time  
5 ns  
Package  
86-pin Plastic TSOP (II) (400 mil)  
125 MHz  
6 ns  
1/44  

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