Datasheet > MPC860ENCZQ80D4

MPC860ENCZQ80D4

更新时间： 2024-11-12 14:53:55

品牌	Logo	应用领域
恩智浦 - NXP		PC
页数	文件大小	规格书
2页	1577K
描述
MPC860ENCZQ80D4

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技术参数
数据手册

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MPC860ENCZQ80D4 技术参数

生命周期：	Transferred	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.8
Is Samacsys：	N	Base Number Matches：	1

MPC860ENCZQ80D4 数据手册

Integrated Communications Processors

MPC860

PowerQUICC^™Family

MPC860 FAMILY BLOCK DIAGRAM

Freescale Semiconductor’s PowerQUICC™

4 or 16 KB

MPC860 family is designed to deliver a

System Interface Unit

Memory Controller

I-Cache

versatile, on-chip integrated processor and

Instruction

Bus

I-MMU

peripheral combination that can be used in a

variety of controller applications—excelling

particularly in communications and networking

products. Providing functionality beyond the

MPC850 family, the MPC860 family and

MPC855T derivative are engineered to provide

higher performance in all areas of device

operation including flexibility, extensions in

capability and integration. The 860 architecture

integrates two processing blocks: the

Embedded

8xx

Core

Bus Interface Unit

System Functions

Real-Time Clock

PCMCIA Interface

Unified Bus

4 or 8 KB

D-Cache

Load/Store

Bus

D-MMU

Fast Ethernet

Controller

DMAs

FIFOs

Four

Interrupt

Dual-Port

RAM

Parallel I/O

Timers

Timer

Control

Baud Rate

Generators

Virtual IDMA

and

32-bit Controller

10/100 Base-T

Media Access

Control

and Program ROM

16 Serial DMA

Parallel

Port Pins

MII

embedded 8xx core compatible with the Power

Architecture™ technology instruction-set

architecture (ISA), and the communications

processor module (CPM). The CPM is designed

to support four serial communications

SCC1

SCC2

SCC3

SCC4

SMC1

SMC2

SPI

Serial Interface

Time Slot Assigner

controllers (SCCs), providing a total of eight

serial channels: four SCCs, two serial

Key Features

> Two SMCs, one SPI and one I²C

management controllers (SMCs), one serial

peripheral interface (SPI) and one I²C interface.

This dual-processor architecture is designed to

provide lower power consumption than

traditional architectures because the CPM

offloads peripheral tasks from the embedded

8xx core.

> Embedded 8xx core

> Additional support features, including

timers, baud rate generators, etc.

> 4 KB instruction cache and

4 KB data cache (16 KB instruction

cache and 8 KB data cache available)

in MPC860P and MPC860DP

> 8K dual-port RAM

> Available at 50, 66 and 80 MHz in a

357-pin PBGA package

> Powerful memory controller

and system functions

> Strong third-party tool support through

Freescale’s Design Alliance Program

> Efficient architecture that involves

a separate RISC processor for

handling communications

> Up to four serial communications

controllers

> Support for Ethernet, Fast Ethernet,

HDLC, asynchronous transfer mode

(ATM) and more

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与MPC860ENCZQ80D4相关器件

型号	品牌	获取价格	描述	数据表
MPC860ENVR50D4	NXP	获取价格	32-BIT, 50MHz, RISC PROCESSOR, PBGA357, 25 X 25 MM, 1.27 MM PITCH, LEAD FREE, PLASTIC, BGA
MPC860ENVR66D4	NXP	获取价格	32-BIT, 66MHz, RISC PROCESSOR, PBGA357, 25 X 25 MM, 1.27 MM PITCH, LEAD FREE, PLASTIC, BGA
MPC860ENVR80D4	NXP	获取价格	32-BIT, 80MHz, RISC PROCESSOR, PBGA357, 25 X 25 MM, 1.27 MM PITCH, LEAD FREE, PLASTIC, BGA
MPC860ENZP25	MOTOROLA	获取价格	RISC Microprocessor, 32-Bit, 25MHz, CMOS, PBGA357, PLASTIC, BGA-357
MPC860ENZP40	MOTOROLA	获取价格	RISC Microprocessor, 32-Bit, 40MHz, CMOS, PBGA357, PLASTIC, BGA-357
MPC860ENZQ50D4	FREESCALE	获取价格	Hardware Specifications
MPC860ENZQ50D4	NXP	获取价格	PowerQUICC, 32 Bit Power Architecture SoC, 50MHz, CPM, ENET, PCMCIA, 0 to 95C
MPC860ENZQ50D4R2	FREESCALE	获取价格	Hardware Specifications
MPC860ENZQ50D4R2	NXP	获取价格	32-BIT, 50MHz, RISC PROCESSOR, PBGA357, 25 X 25 MM, 1.27 MM PITCH, PLASTIC, BGA-357
MPC860ENZQ66D4	FREESCALE	获取价格	Hardware Specifications

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