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MMUN2115LT1G PDF预览

MMUN2115LT1G

更新时间: 2024-01-19 10:14:39
品牌 Logo 应用领域
安森美 - ONSEMI 晶体晶体管光电二极管
页数 文件大小 规格书
12页 122K
描述
PNP Bipolar Digital Transistor (BRT), SOT-23 (TO-236) 3 LEAD, 3000-REEL

MMUN2115LT1G 技术参数

是否无铅:不含铅生命周期:Active
零件包装代码:SOT-23包装说明:SMALL OUTLINE, R-PDSO-G3
针数:3Reach Compliance Code:compliant
ECCN代码:EAR99Factory Lead Time:10 weeks
风险等级:0.7Samacsys Confidence:2
Samacsys Status:ReleasedSamacsys PartID:412124
Samacsys Pin Count:3Samacsys Part Category:Transistor BJT PNP
Samacsys Package Category:SOT23 (3-Pin)Samacsys Footprint Name:SOT-23 (TO-236) CASE 318-08
Samacsys Released Date:2017-05-04 08:31:21Is Samacsys:N
其他特性:BUILT-IN BIAS RESISTOR最大集电极电流 (IC):0.1 A
集电极-发射极最大电压:50 V配置:SINGLE WITH BUILT-IN RESISTOR
最小直流电流增益 (hFE):160JEDEC-95代码:TO-236AB
JESD-30 代码:R-PDSO-G3JESD-609代码:e3
湿度敏感等级:1元件数量:1
端子数量:3最高工作温度:150 °C
封装主体材料:PLASTIC/EPOXY封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
极性/信道类型:PNP最大功率耗散 (Abs):0.4 W
认证状态:Not Qualified子类别:BIP General Purpose Small Signal
表面贴装:YES端子面层:Tin (Sn)
端子形式:GULL WING端子位置:DUAL
处于峰值回流温度下的最长时间:40晶体管应用:SWITCHING
晶体管元件材料:SILICONBase Number Matches:1

MMUN2115LT1G 数据手册

 浏览型号MMUN2115LT1G的Datasheet PDF文件第2页浏览型号MMUN2115LT1G的Datasheet PDF文件第3页浏览型号MMUN2115LT1G的Datasheet PDF文件第4页浏览型号MMUN2115LT1G的Datasheet PDF文件第5页浏览型号MMUN2115LT1G的Datasheet PDF文件第6页浏览型号MMUN2115LT1G的Datasheet PDF文件第7页 
MMUN2111LT1 Series  
Preferred Devices  
Bias Resistor Transistors  
PNP Silicon Surface Mount Transistors  
with Monolithic Bias Resistor Network  
This new series of digital transistors is designed to replace a single  
device and its external resistor bias network. The BRT (Bias Resistor  
Transistor) contains a single transistor with a monolithic bias network  
consisting of two resistors; a series base resistor and a base-emitter  
resistor. The BRT eliminates these individual components by  
integrating them into a single device. The use of a BRT can reduce  
both system cost and board space. The device is housed in the SOT-23  
package which is designed for low power surface mount applications.  
http://onsemi.com  
PIN 3  
COLLECTOR  
(OUTPUT)  
PIN 1  
BASE  
(INPUT)  
R1  
R2  
PIN 2  
EMITTER  
(GROUND)  
Simplifies Circuit Design  
Reduces Board Space  
Reduces Component Count  
The SOT-23 package can be soldered using wave or reflow. The  
modified gull-winged leads absorb thermal stress during soldering  
eliminating the possibility of damage to the die.  
3
1
Available in 8 mm embossed tape and reel. Use the Device Number  
to order the 7 inch/3000 unit reel. Replace “T1” with “T3” in the  
Device Number to order the 13 inch/10,000 unit reel.  
2
SOT–23  
CASE 318  
STYLE 6  
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
A
Rating  
Collector-Base Voltage  
Collector-Emitter Voltage  
Collector Current  
Symbol  
Value  
50  
Unit  
Vdc  
MARKING DIAGRAM  
V
CBO  
CEO  
V
50  
Vdc  
I
C
100  
mAdc  
A6x  
M
THERMAL CHARACTERISTICS  
Characteristic  
Symbol  
Max  
Unit  
A6x  
x
Page 2)  
M
= Device Marking  
= A – L (See  
Total Device Dissipation  
P
D
246 (Note 1.)  
400 (Note 2.)  
1.5 (Note 1.)  
2.0 (Note 2.)  
mW  
T
= 25°C  
A
Derate above 25°C  
°C/W  
°C/W  
°C/W  
°C  
= Date Code  
Thermal Resistance –  
Junction-to-Ambient  
R
508 (Note 1.)  
311 (Note 2.)  
θJA  
DEVICE MARKING INFORMATION  
See specific marking information in the device marking table  
on page 2 of this data sheet.  
Thermal Resistance –  
Junction-to-Lead  
R
174 (Note 1.)  
208 (Note 2.)  
θJL  
Junction and Storage  
Temperature Range  
T , T  
J stg  
–55 to +150  
Preferred devices are recommended choices for future use  
and best overall value.  
1. FR–4 @ Minimum Pad  
2. FR–4 @ 1.0 x 1.0 inch Pad  
Semiconductor Components Industries, LLC, 2001  
1
Publication Order Number:  
November, 2001 – Rev. 2  
MMUN2111LT1/D  

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