Datasheet > MMCP-67201L-40/883

MMCP-67201L-40/883

更新时间： 2024-11-29 14:53:51

品牌	Logo	应用领域
TEMIC		先进先出芯片
页数	文件大小	规格书
17页	180K
描述
FIFO, 512X9, 40ns, Asynchronous, CMOS, 0.300 INCH, SIDEBRAZED-28

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MMCP-67201L-40/883 技术参数

生命周期：	Obsolete	包装说明：	0.300 INCH, SIDEBRAZED-28
Reach Compliance Code：	unknown	风险等级：	5.68
Is Samacsys：	N	最长访问时间：	40 ns
周期时间：	50 ns	内存密度：	4608 bit
内存宽度：	9	功能数量：	1
字数：	512 words	字数代码：	512
工作模式：	ASYNCHRONOUS	最高工作温度：	125 °C
最低工作温度：	-55 °C	组织：	512X9
可输出：	NO	并行/串行：	PARALLEL
认证状态：	Not Qualified	最大供电电压 (Vsup)：	5.5 V
最小供电电压 (Vsup)：	4.5 V	标称供电电压 (Vsup)：	5 V
技术：	CMOS	温度等级：	MILITARY
Base Number Matches：	1

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M67201A/M67202A

512 ꢀ 9 & 1 K ꢀ 9 CMOS Parallel FIFO

Introduction

The M67201A/202A implement a first-in first-out Using an array of eigh transistors (8 T) memory cell and

algorithm, featuring asynchronous read/write operations. fabricated with the state of the art 1.0 µm lithography

The FULL and EMPTY flags prevent data overflow and named SCMOS, the M 67201A/202A combine an

underflow. The Expansion logic allows unlimited extremely low standby supply current (typ = 1.0

µA) with

expansion in word size and depth with no timing fast access time at 25 ns over the full temperature range.

penalties. Twin address pointers automatically generate All versions offer battery backup data retention capability

internal read and write addresses, and no external address with a typical power consumption at less than 5 µW.

information are required for the TEMIC FIFOs. Address

pointers are automatically incremented with the write pin

For military/space applications that demand superior

levels

performance

and

reliability

the

and read pin. The 9 bits wide data are used in data

communications applications where a parity bit for error

checking is necessary. The Retransmit pin reset the Read

pointer to zero without affecting the write pointer. This is

very useful for retransmitting data when an error is

detected in the system.

M 67201A/202A is processed according to the methods

of the latest revision of the MIL STD 883 (class B or S)

and/or ESA SCC 9000.

Features

D First-in first-out dual port memory

D 512 × 9 organisation (M 67201A)

D 1024 × 9 organisation (M 67202A)

D Fast access time

D Asynchronous read/write operations

D Empty, full and half flags in single device mode

D Retransmit capability

D Bi-directional applications

20*, 25, 35, 45, 55 ns, commercial, industrial and

automotive

D Battery back-up operation : 2 V data retention

D TTL compatible

20*, 25, 30, 40, 50 ns, military

D Wide temperature range :

D Single 5 V ± 10 % Power Supply (1)

D High performance SCMOS technology

– 55°C to + 125°C

(1) 3.3 V versions are also available. Please consult sales.

D 67201AL/202AL low power 67201AV/202AV very low

power

D Fully expandable by word width or depth

* Preview. Please Consult Sales.

MATRA MHS

Rev. D (11 April. 97)

12 3 4 5 6 7...17

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与MMCP-67201L-40/883相关器件

型号	品牌	获取价格	描述	数据表
MMCP-67204E-40/883	TEMIC	获取价格	FIFO, 4KX9, 40ns, Asynchronous, CMOS, CDIP28, 0.300 INCH, SIDE BRAZED, CERAMIC, DIP-28
MMCP-67204E-50/883	TEMIC	获取价格	FIFO, 4KX9, 50ns, Asynchronous, CMOS, CDIP28, 0.300 INCH, SIDE BRAZED, CERAMIC, DIP-28
MMCP-67204E-50/SC	MICROCHIP	获取价格	FIFO, 4KX9, 50ns, Asynchronous, CMOS, CDIP28
MMCP-67204EV-50	TEMIC	获取价格	FIFO, 4KX9, 50ns, Asynchronous, CMOS, CDIP28, 0.300 INCH, SIDE BRAZED, CERAMIC, DIP-28
MMCP-67204FV-15	TEMIC	获取价格	FIFO, 4KX9, 15ns, Asynchronous, CMOS, CDIP28, 0.300 INCH, SIDE BRAZED, CERAMIC, DIP-28
MMCP-67204FV-30/883	TEMIC	获取价格	FIFO, 4KX9, 30ns, Asynchronous, CMOS, CDIP28, 0.300 INCH, SIDE BRAZED, CERAMIC, DIP-28
MMCP-67204HV-15-E	ATMEL	获取价格	Rad. Tolerant High Speed 4 Kb x 9 Parallel FIFO
MMCP-67205L-25	ETC	获取价格	x9 Asynchronous FIFO
MMCP-67205L-25/883	TEMIC	获取价格	FIFO, 8KX9, 25ns, Asynchronous, CMOS, CDIP28,
MMCP-67205L-30	TEMIC	获取价格	FIFO, 8KX9, 30ns, Asynchronous, CMOS, CDIP28,

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