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MM74HCT273 PDF预览

MM74HCT273

更新时间: 2024-10-31 22:40:23
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 触发器
页数 文件大小 规格书
7页 95K
描述
Octal D-Type Flip-Flop with Clear

MM74HCT273 数据手册

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February 1984  
Revised February 1999  
MM74HCT273  
Octal D-Type Flip-Flop with Clear  
All inputs to this device are protected from damage due to  
electrostatic discharge by diodes to VCC and ground.  
General Description  
The MM74HCT273 utilizes advanced silicon-gate CMOS  
technology. It has an input threshold and output drive simi-  
lar to LS-TTL with the low standby power of CMOS.  
MM74HCT devices are intended to interface TTL and  
NMOS components to CMOS components. These parts  
can be used as plug-in replacements to reduce system  
power consumption in existing designs.  
These positive edge-triggered flip-flops have a common  
clock and clear-independent Q outputs. Data on a D input,  
having the specified set-up and hold time, is transferred to  
the corresponding Q output on the positive-going transition  
of the clock pulse. The asynchronous clear forces all out-  
puts LOW when it is LOW.  
Features  
Typical propagation delay: 20 ns  
Low quiescent current: 80 µA maximum (74HCT series)  
Fanout of 10 LS-TTL loads  
Ordering Code:  
Order Number  
MM74HCT273WM  
MM74HCT273SJ  
MM74HCT273MTC  
MM74HCT273N  
Package Number  
M20B  
Package Description  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
M20D  
MTC20  
N20A  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagram  
Pin Assignments for DIP, SOIC, SOP and TSSOP  
Top View  
© 1999 Fairchild Semiconductor Corporation  
DS005760.prf  
www.fairchildsemi.com  

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