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MM74HC86N_NL PDF预览

MM74HC86N_NL

更新时间: 2024-11-20 20:57:19
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 光电二极管逻辑集成电路石英晶振触发器
页数 文件大小 规格书
9页 314K
描述
XOR Gate, HC/UH Series, 4-Func, 2-Input, CMOS, PDIP14, 0.300 INCH, PLASTIC, MS-001, DIP-14

MM74HC86N_NL 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP14,.3
针数:14Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.14
系列:HC/UHJESD-30 代码:R-PDIP-T14
JESD-609代码:e3长度:19.18 mm
负载电容(CL):50 pF逻辑集成电路类型:XOR GATE
最大I(ol):0.004 A功能数量:4
输入次数:2端子数量:14
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP14,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT APPLICABLE
电源:2/6 VProp。Delay @ Nom-Sup:30 ns
传播延迟(tpd):151 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:5.08 mm
子类别:Gates最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):4.5 V
表面贴装:NO技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT APPLICABLE
宽度:7.62 mmBase Number Matches:1

MM74HC86N_NL 数据手册

 浏览型号MM74HC86N_NL的Datasheet PDF文件第2页浏览型号MM74HC86N_NL的Datasheet PDF文件第3页浏览型号MM74HC86N_NL的Datasheet PDF文件第4页浏览型号MM74HC86N_NL的Datasheet PDF文件第5页浏览型号MM74HC86N_NL的Datasheet PDF文件第6页浏览型号MM74HC86N_NL的Datasheet PDF文件第7页 
February 2008  
MM74HC86  
Quad 2-Input Exclusive OR Gate  
Features  
General Description  
Typical propagation delay: 9ns  
The MM74HC86 EXCLUSIVE OR gate utilizes  
advanced silicon-gate CMOS technology to achieve  
operating speeds similar to equivalent LS-TTL gates  
while maintaining the low power consumption and high  
noise immunity characteristic of standard CMOS inte-  
grated circuits. These gates are fully buffered and have a  
fanout of 10 LS-TTL loads. The 74HC logic family is  
functionally as well as pin out compatible with the stan-  
dard 74LS logic family. All inputs are protected from  
damage due to static discharge by internal diode clamps  
Wide operating voltage range: 2V–6V  
Low input current: 1µA maximum  
Low quiescent current: 20µA maximum (74 Series)  
Output drive capability: 10 LS-TTL loads  
to V and ground.  
CC  
Ordering Information  
Package  
Order Number Number  
Package Description  
MM74HC86M  
MM74HC86SJ  
MM74HC86MTC  
MM74HC86N  
M14A  
M14D  
MTC14  
N14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.  
All packages are lead free per JEDEC: J-STD-020B standard.  
Connection Diagram  
Truth Table  
Pin Assignments for DIP, SOIC, SOP and TSSOP  
Inputs  
Outputs  
A
L
B
L
Y
L
L
H
L
H
H
L
H
H
H
Y = A B = A B + AB  
Top View  
©1983 Fairchild Semiconductor Corporation  
MM74HC86 Rev. 1.3.0  
www.fairchildsemi.com  

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