Datasheet > 逻辑 > 触发器/锁存器> MM74HC533WM/A+

MM74HC533WM/A+

更新时间： 2024-11-03 13:02:55

品牌	Logo	应用领域
美国国家半导体 - NSC		锁存器
页数	文件大小	规格书
4页	97K
描述
IC,LATCH,SINGLE,8-BIT,HC-CMOS,SOP,20PIN,PLASTIC

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MM74HC533WM/A+ 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
包装说明：	SOP, SOP20,.4	Reach Compliance Code：	unknown
风险等级：	5.92	JESD-30 代码：	R-PDSO-G20
JESD-609代码：	e0	逻辑集成电路类型：	D LATCH
位数：	8	功能数量：	1
端子数量：	20	最高工作温度：	85 °C
最低工作温度：	-40 °C	输出特性：	3-STATE
封装主体材料：	PLASTIC/EPOXY	封装代码：	SOP
封装等效代码：	SOP20,.4	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE	电源：	2/6 V
子类别：	FF/Latches	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	Tin/Lead (Sn/Pb)	端子形式：	GULL WING
端子节距：	1.27 mm	端子位置：	DUAL
Base Number Matches：	1

MM74HC533WM/A+ 数据手册

January 1988

MM54HC533/MM74HC533

TRI-STATE Octal D-Type Latch

with Inverted Outputs

General Description

These high speed OCTAL D-TYPE LATCHES utilize ad-

vanced silicon-gate CMOS technology. They possess the

high noise immunity and low power consumption of stan-

dard CMOS integrated circuits, as well as the ability to drive

15 LS-TTL loads. Due to the large output drive capability

and the TRI-STATE feature, these devices are ideally suited

for interfacing with bus lines in a bus organized system.

The 54HC/74HC logic family is speed, function, and pin-out

compatible with the standard 54LS/74LS logic family. All

inputs are protected from damage due to static discharge by

internal diode clamps to V

and ground.

Features

Typical propagation delay: 18 ns

When the LATCH ENABLE input is high, the data present

on the D inputs will appear inverted at the Q outputs. When

the LATCH ENABLE goes low, the inverted data will be re-

tained at the Q outputs until LATCH ENABLE returns high

again. When a high logic level is applied to the OUTPUT

CONTROL input, all outputs go to a high impedance state,

regardless of what signals are present at the other inputs

and the state of the storage elements.

Wide operating voltage range: 2 to 6 volts

Low input current: 1 mA maximum

Low quiescent current: 80 mA, maximum (74HC Series)

Compatible with bus-oriented systems

Output drive capability: 15 LS-TTL loads

Connection Diagram

Dual-In-Line Package

TL/F/5339–1

Top View

Order Number MM54HC533 or MM74HC533

Truth Table

Latch

Enable

Output

Control

low level

high level, L

Data

Output

level of output before steady-state input conditions

were established.

high impedance

TRI-STATEÉ is a registered trademark of National Semiconductor Corp.

1995 National Semiconductor Corporation

TL/F/5339

RRD-B30M105/Printed in U. S. A.

12 3 4

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与MM74HC533WM/A+相关器件

型号	品牌	获取价格	描述	数据表
MM74HC533WMX	TI	获取价格	HC/UH SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDSO20, PLASTIC, SO-20
MM74HC534J	TI	获取价格	HC/UH SERIES, 8-BIT DRIVER, INVERTED OUTPUT, CDIP20, CERAMIC, DIP-20
MM74HC534J	NSC	获取价格	IC HC/UH SERIES, 8-BIT DRIVER, INVERTED OUTPUT, CDIP20, CERAMIC, DIP-20, Bus Driver/Transc
MM74HC534J	FAIRCHILD	获取价格	D Flip-Flop, 8-Func, Positive Edge Triggered, CMOS, CDIP20
MM74HC534J/A+	TI	获取价格	IC,FLIP-FLOP,OCTAL,D TYPE,HC-CMOS,DIP,20PIN,CERAMIC
MM74HC534N	FAIRCHILD	获取价格	D Flip-Flop, 8-Func, Positive Edge Triggered, CMOS, PDIP20
MM74HC534N	NSC	获取价格	IC HC/UH SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDIP20, PLASTIC, DIP-20, Bus Driver/Transc
MM74HC534N/A+	TI	获取价格	IC,FLIP-FLOP,OCTAL,D TYPE,HC-CMOS,DIP,20PIN,PLASTIC
MM74HC534N/B+	TI	获取价格	IC,FLIP-FLOP,OCTAL,D TYPE,HC-CMOS,DIP,20PIN,PLASTIC
MM74HC534WM/A+	TI	获取价格	IC,FLIP-FLOP,OCTAL,D TYPE,HC-CMOS,SOP,20PIN,PLASTIC

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