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MM74HC244_05 PDF预览

MM74HC244_05

更新时间: 2024-11-25 05:08:31
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
8页 107K
描述
Octal 3-STATE Buffer

MM74HC244_05 数据手册

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September 1983  
Revised May 2005  
MM74HC244  
Octal 3-STATE Buffer  
General Description  
The MM74HC244 is a non-inverting buffer and has two  
Features  
Typical propagation delay: 14 ns  
active low enables (1G and 2G); each enable indepen-  
3-STATE outputs for connection to system buses  
Wide power supply range: 2–6V  
dently controls  
4 buffers. This device does not have  
Schmitt trigger inputs.  
Low quiescent supply current: 80  
Output current: 6 mA  
A
These 3-STATE buffers utilize advanced silicon-gate  
CMOS technology and are general purpose high speed  
non-inverting buffers. They possess high drive current out-  
puts which enable high speed operation even when driving  
large bus capacitances. These circuits achieve speeds  
comparable to low power Schottky devices, while retaining  
the advantage of CMOS circuitry, i.e., high noise immunity,  
and low power consumption. All three devices have a  
fanout of 15 LS-TTL equivalent inputs.  
All inputs are protected from damage due to static dis-  
charge by diodes to VCC and ground.  
Ordering Code:  
Order Number Package Number  
Package Description  
MM74HC244WM  
MM74HC244SJ  
MM74HC244MTC  
MM74HC244N  
M20B  
M20D  
MTC20  
N20A  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter Xto the ordering code.  
Connection Diagram  
Truth Table  
1G  
L
1A  
1Y  
L
2G  
L
2A  
L
2Y  
L
L
H
L
L
H
Z
L
H
L
H
Z
H
H
H
H
H
Z
H
Z
H
L
HIGH Level  
LOW Level  
Z
High Impedance  
Top View  
© 2005 Fairchild Semiconductor Corporation  
DS005327  
www.fairchildsemi.com  

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