MM74HC245A

更新时间： 2024-11-17 23:02:43

品牌	Logo	应用领域
美国国家半导体 - NSC		/
页数	文件大小	规格书
6页	130K
描述
Octal TRI-STATE Transceiver

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MM74HC245A 数据手册

January 1988

MM54HC245A/MM74HC245A

Octal TRI-STATE Transceiver

General Description

This TRI-STATE bidirectional buffer utilizes advanced sili-

con-gate CMOS technology, and is intended for two-way

asynchronous communication between data buses. It has

high drive current outputs which enable high speed opera-

tion even when driving large bus capacitances. This circuit

possesses the low power consumption and high noise im-

This device can drive up to 15 LS-TTL Loads, and does not

have Schmitt trigger inputs. All inputs are protected from

damage due to static discharge by diodes to V

ground.

and

Features

munity usually associated with CMOS circuitry, yet has

speeds comparable to low power Schottky TTL circuits.

Typical propagation delay: 13 ns

Wide power supply range: 2–6V

Low quiescent current: 80 mA maximum (74 HC)

This device has an active low enable input G and a direction

control input, DIR. When DIR is high, data flows from the A

TRI-STATE outputs for connection to bus oriented

systems

inputs to the B outputs. When DIR is low, data flows from

B inputs to the A outputs. The MM54HC245A/

the

MM74HC245A transfers true data from one bus to the oth-

er.

High output drive: 6 mA (minimum)

Same as the ’645

Connection Diagram

Dual-In-Line Package

TL/F/5165–1

Top View

Order Number MM54HC245A or MM74HC245A

Truth Table

Control

Inputs

Operation

DIR

B data to A bus

A data to B bus

Isolation

low level, X irrelevant

high level, L

TRI-STATEÉ is a registered trademark of National Semiconductor Corp.

1995 National Semiconductor Corporation

TL/F/5165

RRD-B30M105/Printed in U. S. A.

12 3 4 5 6

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