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MKE15Z32VLD4 PDF预览

MKE15Z32VLD4

更新时间: 2024-09-26 02:49:39
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
82页 1593K
描述
Kinetis KE1xZ with up to 64 KB Flash

MKE15Z32VLD4 数据手册

 浏览型号MKE15Z32VLD4的Datasheet PDF文件第2页浏览型号MKE15Z32VLD4的Datasheet PDF文件第3页浏览型号MKE15Z32VLD4的Datasheet PDF文件第4页浏览型号MKE15Z32VLD4的Datasheet PDF文件第5页浏览型号MKE15Z32VLD4的Datasheet PDF文件第6页浏览型号MKE15Z32VLD4的Datasheet PDF文件第7页 
NXP Semiconductors  
Data Sheet: Technical Data  
KE1xZP48M48SF0  
Rev. 3, 06/2020  
Kinetis KE1xZ with up to 64 KB  
MKE1xZ64VLF4  
MKE1xZ64VLD4  
MKE1xZ64VFP4  
MKE1xZ32VLF4  
MKE1xZ32VLD4  
MKE1xZ32VFP4  
Flash  
Up to 48 MHz Arm® Cortex®-M0+ Based Microcontroller  
Providing up to 64 KB flash, up to 8 KB RAM, and a complete set  
of analog/digital features, KE1xZ64 offers a robust Touch Sense  
Interface (TSI) and CAN bus for industrial networking, which  
provides high-level stability and accuracy in customer's home  
appliance touch UI and industrial control systems.  
48 LQFP (LF)  
7x7x1.4 mm P 0.5  
44 LQFP (LD)  
10x10x1.4 mm P 0.8  
40 QFN (FP)  
5x5x0.85 mm P 0.4  
Core Processor and System  
• Arm® Cortex®-M0+ core, supports up to 48 MHz  
frequency  
Memory and memory interfaces  
• Up to 64 KB program flash  
• Up to 8 KB SRAM  
• Arm Core based on the ARMv6 Architecture and  
• 64 Bytes flash cache  
Thumb®-2 ISA  
Mixed-signal analog  
• Configurable Nested Vectored Interrupt Controller  
(NVIC)  
• Memory-Mapped Divide and Square Root module  
(MMDVSQ)  
• 1× 12-bit analog-to-digital converter (ADC) with up  
to 16 channel analog inputs per module, up to 1  
Msps  
• 1× high-speed analog comparators (CMP) with  
internal 8-bit digital to analog converter (DAC)  
Reliability, safety and security  
• Cyclic Redundancy Check (CRC) generator module  
• 128-bit unique identification (ID) number  
• Internal watchdog (WDOG) with independent clock  
source  
• External watchdog monitor (EWM) module  
• ADC self calibration feature  
Timing and control  
• 2× Flex Timers (FTM) for PWM generation, offering  
6ch+2ch  
• 1× 16-bit Low-Power Timer (LPTMR) with flexible  
wake up control  
• 1× Programmable Delay Block (PDB) with flexible  
trigger system  
• On-chip clock loss monitoring  
Power management  
• 1× 32-bit Low-power Periodic Interrupt Timer (LPIT)  
with 2 independent channels  
• Real timer clock (RTC)  
• Low-power Arm Cortex-M0+ core with excellent energy  
efficiency  
• Power management controller (PMC) with multiple  
power modes: Run, Wait, Stop, VLPR, VLPW and  
VLPS  
Debug functionality  
• Serial Wire Debug (SWD) debug interface  
• Debug Watchpoint and Trace (DWT)  
• Micro Trace Buffer (MTB)  
NXP reserves the right to change the production detail specifications as may be  
required to permit improvements in the design of its products.  

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