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MKE04Z128VLD4 PDF预览

MKE04Z128VLD4

更新时间: 2024-11-14 00:46:47
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
37页 670K
描述
KE04 Sub-Family

MKE04Z128VLD4 数据手册

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Document Number MKE04P80M48SF0  
Rev. 4, 07/2016  
NXP Semiconductors  
Data Sheet: Technical Data  
MKE04P80M48SF0  
KE04 Sub-Family Data Sheet  
Supports the following:  
MKE04Z64VLD4(R),  
MKE04Z128VLD4(R),  
MKE04Z64VQH4(R),  
MKE04Z128VQH4(R),  
MKE04Z64VLH4(R),  
MKE04Z128VLH4(R),  
MKE04Z64VLK4(R) and  
MKE04Z128VLK4(R)  
Key features  
• Security and integrity modules  
– 80-bit unique identification (ID) number per chip  
• Operating characteristics  
– Voltage range: 2.7 to 5.5 V  
• Human-machine interface  
– Flash write voltage range: 2.7 to 5.5 V  
– Temperature range (ambient): -40 to 105°C  
– Up to 71 general-purpose input/output (GPIO)  
– Two 32-bit keyboard interrupt modules (KBI)  
– External interrupt (IRQ)  
• Performance  
– Up to 48 MHz ARM® Cortex-M0+ core  
– Single cycle 32-bit x 32-bit multiplier  
– Single cycle I/O access port  
• Analog modules  
– One up to 16-channel 12-bit SAR ADC, operation in  
Stop mode, optional hardware trigger (ADC)  
– Two analog comparators containing a 6-bit DAC  
and programmable reference input (ACMP)  
• Memories and memory interfaces  
– Up to 128 KB flash  
– Up to 16 KB RAM  
• Timers  
– One 6-channel FlexTimer/PWM (FTM)  
– Two 2-channel FlexTimer/PWM (FTM)  
– One 2-channel periodic interrupt timer (PIT)  
– One pulse width timer (PWT)  
– One real-time clock (RTC)  
• Clocks  
– Oscillator (OSC) - supports 32.768 kHz crystal or 4  
MHz to 24 MHz crystal or ceramic resonator; choice  
of low power or high gain oscillators  
– Internal clock source (ICS) - internal FLL with  
internal or external reference, 37.5 kHz pre-trimmed  
internal reference for 48 MHz system clock  
– Internal 1 kHz low-power oscillator (LPO)  
• Communication interfaces  
– Two SPI modules (SPI)  
– Up to three UART modules (UART)  
– Two I2C modules (I2C)  
• System peripherals  
– Power management module (PMC) with three power  
modes: Run, Wait, Stop  
• Package options  
– 80-pin LQFP  
– Low-voltage detection (LVD) with reset or interrupt,  
selectable trip points  
– 64-pin QFP/LQFP  
– 44-pin LQFP  
– Watchdog with independent clock source (WDOG)  
– Programmable cyclic redundancy check module  
(CRC)  
– Serial wire debug interface (SWD)  
– Aliased SRAM bitband region (BIT-BAND)  
– Bit manipulation engine (BME)  
NXP reserves the right to change the production detail specifications as may be  
required to permit improvements in the design of its products.  

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