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MJ14001_05 PDF预览

MJ14001_05

更新时间: 2024-11-14 10:55:55
品牌 Logo 应用领域
安森美 - ONSEMI 晶体晶体管
页数 文件大小 规格书
5页 91K
描述
High?Current Complementary Silicon Power Transistors

MJ14001_05 数据手册

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MJ14001 (PNP),  
MJ14002* (NPN),  
MJ14003* (PNP)  
*Preferred Devices  
High−Current Complementary  
Silicon Power Transistors  
Designed for use in high−power amplifier and switching circuit  
applications.  
http://onsemi.com  
Features  
60 AMPERE  
High Current Capability − I Continuous = 60 Amperes  
C
COMPLEMENTARY SILICON  
POWER TRANSISTORS  
60−80 VOLTS, 300 WATTS  
DC Current Gain − h = 15−100 @ I = 50 Adc  
FE  
C
Low Collector−Emitter Saturation Voltage −V  
= 2.5 Vdc (Max)  
CE(sat)  
@ I = 50 Adc  
C
Pb−Free Packages are Available*  
MARKING  
DIAGRAM  
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
J
Rating  
Symbol  
Value  
Unit  
Collector−Emitter Voltage  
MJ14001  
MJ14002/03  
V
V
V
60  
80  
Vdc  
CEO  
CBO  
EBO  
Collector−Base Voltage  
Emitter−Base Voltage  
MJ14001  
MJ14002/03  
60  
80  
Vdc  
MJ1400xG  
AYYWW  
MEX  
5.0  
60  
15  
75  
Vdc  
Adc  
Adc  
Adc  
Collector Current − Continuous  
Base Current − Continuous  
Emitter Current − Continuous  
I
C
I
I
TO−204 (TO−3)  
CASE 197A  
STYLE 1  
B
E
Total Power Dissipation @ T = 25°C  
P
300  
1.71  
W
W/°C  
C
D
Derate Above 25°C  
MJ1400x = Device Code  
xx = 1, 2, or 3  
Operating and Storage Junction  
Temperature Range  
T , T  
J
65 to +200  
°C  
stg  
G
A
YY  
WW  
MEX  
= Pb−Free Package  
= Location Code  
= Year  
= Work Week  
= Country of Orgin  
Maximum ratings are those values beyond which device damage can occur.  
Maximum ratings applied to the device are individual stress limit values (not  
normal operating conditions) and are not valid simultaneously. If these limits are  
exceeded, device functional operation is not implied, damage may occur and  
reliability may be affected.  
360  
330  
ORDERING INFORMATION  
Device  
Package  
Shipping  
MJ14001  
TO−3  
100 Units/Tray  
100 Units/Tray  
270  
210  
150  
90  
MJ14001G  
TO−3  
(Pb−Free)  
MJ14002  
TO−3  
100 Units/Tray  
100 Units/Tray  
MJ14002G  
TO−3  
(Pb−Free)  
MJ14003  
TO−3  
100 Units/Tray  
100 Units/Tray  
30  
0
MJ14003G  
TO−3  
(Pb−Free)  
0
40  
80  
120  
160  
200  
240  
T , CASE TEMPERATURE (°C)  
Figure 1. Power Derating  
C
Preferred devices are recommended choices for future use  
and best overall value.  
*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting  
Techniques Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
December, 2005 − Rev. 6  
MJ14001/D  

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