Document Number: MHVIC915R2
Rev. 8, 8/2006
Freescale Semiconductor
Technical Data
RF LDMOS Wideband Integrated
Power Amplifier
The MHVIC915R2 wideband integrated circuit is designed with on-chip
matching that makes it usable from 750 to 1000 MHz. This multi-stage
structure is rated for 26 to 28 Volt operation and covers all typical cellular base
station modulation formats.
MHVIC915R2
Final Application
• Typical Single-Carrier N-CDMA Performance: VDD = 27 Volts, IDQ1
=
746-960 MHz, 15 W, 27 V
SINGLE N-CDMA, GSM/GSM EDGE
RF LDMOS WIDEBAND
80 mA, IDQ2 = 120 mA, Pout = 34 dBm, Full Frequency Band (746 to
960 MHz), IS-95 CDMA (Pilot, Sync, Paging, Traffic Codes 8 Through 13)
Power Gain — 31 dB
Power Added Efficiency — 21%
ACPR @ 750 kHz Offset — -50 dBc @ 30 kHz Bandwidth
INTEGRATED POWER AMPLIFIER
Driver Applications
• Typical Single-Carrier N-CDMA Performance: VDD = 27 Volts, IDQ1 = 80
mA, IDQ2 = 120 mA, Pout = 23 dBm, Full Frequency Band (869-
894 MHz), IS-95 CDMA (Pilot, Sync, Paging, Traffic Codes 8 Through 13),
Channel Bandwidth = 1.2288 MHz. PAR = 9.8 dB @ 0.01%
Probability on CCDF.
16
1
CASE 978-03
PFP-16
PLASTIC
Power Gain — 31 dB
Power Added Efficiency — 21%
ACPR @ 750 kHz Offset — -60 dBc @ 30 kHz Bandwidth
ACPR @ 1.98 MHz Offset — -66 dBc @ 30 kHz Bandwidth
• Typical GSM Performance: VDD = 26 Volts, Pout = 15 W P1dB, Full
Frequency Band (921-960 MHz)
Power Gain — 30 dB @ P1dB
Power Added Efficiency = 56% @ P1dB
Replaced by MHVIC915NR2. There are
no form, fit or function changes with this
part replacement. N suffix indicates RoHS
compliant part.
• Capable of Handling 3:1 VSWR, @ 27 Vdc, 880 MHz, 15 Watts CW
Output Power
• Characterized with Series Equivalent Large-Signal Impedance Parameters
• On-Chip Matching (50 Ohm Input, DC Blocked, >9 Ohm Output)
• Integrated Quiescent Current Temperature Compensation with
Enable/Disable Function
• On-Chip Current Mirror gm Reference FET for Self Biasing Application (1)
• Integrated ESD Protection
• In Tape and Reel. R2 Suffix = 1,500 Units per 16 mm, 13 inch Reel.
V
N.C.
1
2
3
4
N.C.
RD1
16
15
14
13
12
11
V
V
/RF
/RF
/RF
/RF
/RF
/RF
RG1
V
DS2
out
out
out
out
out
out
RD1
RG1
V
V
DS2
V
DS1
2 Stage IC
V
V
DS1
DS2
GND
5
6
7
8
V
DS2
V
RF
V
/RF
RF
DS2
in
DS2
out
in
V
V
10
9
GS1
DS2
V
N.C.
GS2
V
V
GS1
GS2
Quiescent Current
Temperature Compensation
(Top View)
Note: Exposed backside flag is source
terminal for transistors.
Figure 1. Block Diagram
Figure 2. Pin Connections
1. Refer to AN1987, Quiescent Current Control for the RF Integrated Circuit Device Family. Go to http://www.freescale.com/rf.
Select Documentation/Application Notes - AN1987.
© Freescale Semiconductor, Inc., 2006. All rights reserved.
MHVIC915R2
RF Device Data
Freescale Semiconductor
1