Datasheet > MEC1308

MEC1308

更新时间： 2024-11-21 14:53:39

品牌	Logo	应用领域
美国微芯 - MICROCHIP		/
页数	文件大小	规格书
11页	402K
描述
MEC1308 is a Notebook I/O Controller which incorporates a high-performance 8051-based keyboard s

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MEC1308 数据手册

MEC1308

Keyboard and Embedded Controller for Notebook PC

- Thirty-Two 8-Bit, Host/8051 Mailbox Regis-

ters

Features

• 3.3V Operation with 5V Tolerant Buffers on PS/2

pins

- Sixty-Four Maskable Hardware Wake-Up

Events

• ACPI 1.0/2.0 PC99/PC2001 Compliant

• LPC Interface with Clock Run Support

- Fast GATEA20

- Fast CPU_RESET

- Serial IRQ Interface Compatible with Serial-

ized IRQ Support for PCI Systems

- Multiple Clock Sources and Operating Fre-

quencies

- 15 Direct IRQs

- IDLE and SLEEP Modes

- ACPI SCI Interface

• Accurate Fail-Safe Ring Oscillator

- nSMI output and supporting PM registers

- Shadowed write only registers

• Internal 64K SRAM

- Single Clock source for most 8051 and SIO

functions

- Provides 2% frequency accuracy

- Lock Bit provides status

- Loaded at VCC1 power from the HOST/8051

SPI Memory Interface

• Integrated Standby Power Reset Generator

- VCC1_RST# output

- Provides 64KB of 8051 program space

- 32k-Byte region shared with 8051data space

• HOST/8051 SPI Memory Interface

• VCC0 Backed Resources

- 16 Byte VCC0 Backed Registers

- VCC0 Backed Status Register

- 32.768KHz-input clock

- 3-pin Full Duplex serial communication inter-

face.

- Two Chip Select Pins

- Fully 8051 Controlled

- <2μA Standby Current (typ)

• Two 8584-Style I²C/SMBus Controllers

- 8051 Controlled Logic Allows I²C/SMBus

Master or Slave Operation

- I²C/SMBus Controllers are Fully Operational

on Standby Power

- 2 Sets of Dedicated Pins per I²C/SMBus

Controller

- Hardware Support for two SPI Flash Configu-

rations:

- Switched SPI Flash Configuration

- Parallel Shared SPI Flash Configuration

• Two Power Planes

- Low Standby Current in Sleep Mode

• ACPI Embedded Controller Interface

• Four independent Hardware Driven PS/2 Ports

• 48 General Purpose I/O Pins

• Configuration Register Set Compatible with ISA

Plug-and-Play Standard (Version 1.0a)

- Maskable Hardware Wake-Event Capable

• High-Performance Embedded 8051 Keyboard

and System Controller

- Programmable Open-Drain/Push-Pull Out-

puts

- Provides System Power Management

- System Watch Dog Timer (WDT)

- 8042 Style Host Interface

• 7 General-Purpose Outputs

• Four Programmable Pulse-Width Modulator Out-

puts

- Supports Interrupt and Polling Access

- 1024 Boot /ROM

- Independent Clock Rates

- 6-Bit Duty Cycle Granularity

- 256 Bytes Data RAM

- Operational in both Full on and Standby

modes

- On-Chip Memory-Mapped Control Registers

- Access to VCC0 Backed Registers

- Up to 18x8 Keyboard Scan Matrix

- Two 16-Bit Timer/Counters

• Consumer Infrared Receiver for Vista (CIRV)

- Consumer Infrared Remote Control Receiver

Interface

- Integrated Full-Duplex Serial Port Interface

- Seventy-Three 8051 Interrupt Sources

- Support of all common CIR formats in S0

power state, per Vista standard mechanism.

 2014 Microchip Technology Inc.

DS00001753A-page 1

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