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MEC1521-H-B-I3Y-TR PDF预览

MEC1521-H-B-I3Y-TR

更新时间: 2024-10-27 02:45:11
品牌 Logo 应用领域
美国微芯 - MICROCHIP PC
页数 文件大小 规格书
570页 6226K
描述
Keyboard and Embedded Controller for Notebook PC

MEC1521-H-B-I3Y-TR 数据手册

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MEC152x  
Keyboard and Embedded Controller for Notebook PC  
-
-
Supports Mode 0 and mode 3  
24MHz  
Operating Conditions  
• Operating Voltages: 3.3 V and 1.8 V  
• Operating Temperature Range: -40 oC to 85 oC  
Clocks  
• 48 MHz Internal PLL  
• 32 kHz Clock Sources  
Low Power Modes  
• Chip is designed to always operate in Lowest  
Power state during Normal Operation  
-
-
-
Internal 32 kHz silicon oscillator  
External 32 kHz crystal (XTAL) source  
• Supports all 5 ACPI Power States for PC plat-  
forms  
External single-ended 32 kHz clock  
source  
• Supports 2 Chip-level Sleep Modes: Light Sleep  
and Heavy Sleep  
Package Options  
- Low Standby Current in Sleep Modes  
- 144 pin WFBGA  
- 128 pin VTQFP  
- 128 pin WFBGA  
ARM® Cortex-M4 Embedded Processor  
• Programmable clock frequency up to 48 MHz  
• Fixed point processor  
Security Features  
• Single 4GByte Addressing Space  
• Nested Vectored Interrupt Controller (NVIC)  
- Maskable Interrupt Controller  
• Boot ROM Secure Boot Loader  
- Hardware Root of Trust (RoT) using Secure  
Boot and Immutable Code using ECDSA p-  
384 and SHA-384  
- Maskable hardware wake up events  
- 8 Levels of priority, individually assignable by  
vector  
- Supports 2 Code Images in external SPI  
Flash (Primary and Fall back image)  
• EC Interrupt Aggregator expands number of Inter-  
rupt sources supported or reduces number of vec-  
tors needed  
• Complete ARM® Standard debug support  
- Supports Full EC firmware redundancy over  
Two Flash components  
- Authenticates SPI Flash image before load-  
ing  
- JTAG-Based DAP port, comprised of SWJ-  
DP and AHB-AP debugger access functions  
- Support AES-256 Encrypted SPI Flash  
images  
- Key Revocation  
Memory Components  
- Roll back protection up to 128 Revisions  
• Hardware Accelerators:  
- 256 KB Code/Data SRAM  
-
-
224 KB optimized for code performance  
32 KB optimized for data performance  
- Multi purpose AES Crypto Engine:  
-
-
Support for 128-bit - 256-bit key length  
- 64 Bytes Battery Powered Storage SRAM  
- 4K bits OTP  
Supports Battery Authentication applica-  
tions  
-
In circuit programmable  
- Digital Signature Algorithm Support  
Support for ECDSA and EC_KCDSA  
- Cryptographic Hash Engine  
Support for SHA-1, SHA-256 to SHA-512  
- Public Key Crypto Engine  
- ROM  
-
-
-
Contains Boot ROM  
Contains Runtime APIs for built-in func-  
tions  
-
- 2K byte Internal EEPROM (MEC1523 Only)  
-
Hardware support for RSA and Elliptic  
Curve asymmetric public key algorithms  
- 4Mbit in-chip SPI Serial Flash (MEC1527  
only)  
-
-
RSA keys length of 1024 to 4096 bits  
ECC Prime Field keys up to 571 bits  
-
-
SST25PF040C  
SPI Master controller  
2020 Microchip Technology Inc.  
DS00003427D-page 1  

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