MCTV65P100F1,
MCTA65P100F1
Semiconductor
65A, 1000V
P-Type MOS Controlled Thyristor (MCT)
April 1999
Features
Package
JEDEC STYLE TO-247
• 65A, -1000V
ANODE ANODE
CATHODE
• VTM ≤ -1.4V at I = 65A and +150oC
• 2000A Surge Current Capability
• 2000A/µs di/dt Capability
GATE RETURN
CATHODE (FLANGE)
GATE
• MOS Insulated Gate Control
• 100A Gate Turn-Off Capability at +150oC
Description
JEDEC MO-093AA (5-LEAD TO-218)
The MCT is an MOS Controlled Thyristor designed for switching
currents on and off by negative and positive voltage control of an
insulated MOS gate. It is designed for use in motor controls,
inverters, line switches and other power switching applications.
ANODE ANODE
CATHODE
GATE RETURN
GATE
The MCT is especially suited for resonant (zero voltage or zero
current switching) applications. The SCR like forward drop
greatly reduces conduction power loss.
CATHODE (FLANGE)
MCTs allow the control of high power circuits with very small
amounts of input energy. They feature the high peak current
capability common to SCR type thyristors, and operate at junc-
tion temperatures up to +150oC with active switching.
Symbol
A
K
G
PART NUMBER INFORMATION
PART NUMBER
MCTV65P100F1
MCTA65P100F1
PACKAGE
TO-247
MO-093AA
BRAND
M65P100F1
M65P100F1
NOTE: When ordering, use the entire part number.
Formerly TA9900.
o
Absolute Maximum Ratings T = +25 C, Unless Otherwise Specified
C
MCTV65P100F1
MCTA65P100F1
UNITS
Peak Off-State Voltage (See Figure 11). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDRM
Peak Reverse Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VRRM
Continuous Cathode Current (See Figure 2)
-1000
+5
V
V
o
TC = +25 C (Package Limited) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IK25
85
65
A
A
o
TC = +90 C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IK90
Non-Repetitive Peak Cathode Current (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ITSM
Peak Controllable Current (See Figure 10) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ITC
Gate-Anode Voltage (Continuous) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGA
Gate-Anode Voltage (Peak) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGA
Rate of Change of Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . dv/dt
Rate of Change of Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . di/dt
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PT
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG
2000
100
A
A
V
V
±20
±25
See Figure 11
2000
A/µs
208
W
o
1.67
W/ C
o
-55 to +150
260
C
o
Maximum Lead Temperature for Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
(0.063" (1.6mm) from case for 10s)
C
NOTE:
o
o
1. Maximum Pulse Width of 200µs (Half Sine) Assume T (Initial) = +90 C and T (Final) = T (Max) = +150 C
J
J
J
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper ESD Handling Procedures.
File Number 3516.5
Copyright © Harris Corporation 1999
2-13