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MCP6S28-I/SL PDF预览

MCP6S28-I/SL

更新时间: 2024-01-07 01:18:47
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美国微芯 - MICROCHIP /
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MCP6S28-I/SL 数据手册

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MCP6S21/2/6/8  
M
Single-Ended, Rail-to-Rail I/O, Low Gain PGA  
Features  
Description  
• Multiplexed Inputs: 1, 2, 6 or 8 channels  
• 8 Gain Selections:  
- +1, +2, +4, +5, +8, +10, +16 or +32 V/V  
• Serial Peripheral Interface (SPI™)  
• Rail-to-Rail Input and Output  
• Low Gain Error: ±1% (max)  
The Microchip Technology Inc. MCP6S21/2/6/8 are  
analog Programmable Gain Amplifiers (PGA). They  
can be configured for gains from +1 V/V to +32 V/V and  
the input multiplexer can select one of up to eight chan-  
nels through an SPI port. The serial interface can also  
put the PGA into shutdown to conserve power. These  
PGAs are optimized for high speed, low offset voltage  
and single-supply operation with rail-to-rail input and  
output capability. These specifications support single  
supply applications needing flexible performance or  
multiple inputs.  
The one channel MCP6S21 and the two channel  
MCP6S22 are available in 8-pin PDIP, SOIC and  
MSOP packages. The six channel MCP6S26 is avail-  
able in 14-pin PDIP, SOIC and TSSOP packages. The  
eight channel MCP6S28 is available in 16-pin PDIP  
and SOIC packages. All parts are fully specified from  
-40°C to +85°C.  
• Low Offset: ±275 µV (max)  
• High Bandwidth: 2 to 12 MHz (typ)  
• Low Noise: 10 nV/Hz @ 10 kHz (typ)  
• Low Supply Current: 1.0 mA (typ)  
• Single Supply: 2.5V to 5.5V  
Typical Applications  
• A/D Converter Driver  
• Multiplexed Analog Applications  
• Data Acquisition  
• Industrial Instrumentation  
Test Equipment  
• Medical Instrumentation  
Block Diagram  
VDD  
CH0  
+
Package Types  
CH1  
VOUT  
CH2  
-
MCP6S21  
MCP6S22  
CH3  
MUX  
CH4  
PDIP, SOIC, MSOP  
PDIP, SOIC, MSOP  
CH5  
VDD  
8
VOUT  
VDD VOUT  
1
2
3
4
8
1
2
3
4
RF  
CH6  
CH7  
8
CH0  
VREF  
VSS  
7 SCK CH0  
6
5
7 SCK  
6 SI  
Gain  
Switches  
SI  
CS  
CH1  
VSS  
CS  
SI  
RG  
5 CS  
SPI™  
Logic  
SO  
SCK  
MCP6S26  
PDIP, SOIC, TSSOP  
MCP6S28  
PDIP, SOIC  
POR  
VOUT  
V
14  
V
VOUT  
1
CH0 2  
CH1 3  
CH2 4  
1
16  
VREF  
DD  
VSS  
DD  
13 SCK  
12 SO  
11 SI  
CH0 2  
CH1 3  
15 SCK  
14 SO  
13 SI  
4
CH2  
CH3 5  
CH3 5  
CH4 6  
CH5 7  
10 CS  
12 CS  
VSS  
VSS  
6
9
CH4  
11  
VREF  
8
V
CH5 7  
CH6 8  
10  
REF  
9 CH7  
2003 Microchip Technology Inc.  
DS21117A-page 1  

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