MCP6481/2/4
4 MHz, Low-Input Bias Current Op Amps
Features
Description
• Low-Input Bias Current
- 150 pA (typical, TA = +125°C)
• Low Quiescent Current
- 240 µA/amplifier (typical)
• Low-Input Offset Voltage
- ±1.5 mV (maximum)
The Microchip MCP6481/2/4 family of operational
amplifiers (op amps) has low-input bias current
(150 pA, typical at 125°C) and rail-to-rail input and
output operation. This family is unity gain stable and
has a gain bandwidth product of 4 MHz (typical). These
devices operate with a single-supply voltage as low as
2.2V, while only drawing 240 µA/amplifier (typical) of
quiescent current. These features make the family of
op amps well suited for photodiode amplifier, pH
electrode amplifier, low leakage amplifier, and battery-
powered signal conditioning applications, etc.
• Supply Voltage Range: 2.2V to 5.5V
• Rail-to-Rail Input/Output
• Gain Bandwidth Product: 4 MHz (typical)
• Slew Rate: 2.7 V/µs (typical)
• Unity Gain Stable
The MCP6481/2/4 family is offered in single
(MCP6481), dual (MCP6482), quad (MCP6484)
packages. All devices are designed using an advanced
CMOS process and fully specified in extended
temperature range from -40°C to +125°C.
• No Phase Reversal
• Small Packages
- Singles in SC70-5, SOT-23-5
• Extended Temperature Range
- -40°C to +125°C
Related Parts
• MCP6471/2/4: 2 MHz, Low-Input Bias Current Op
Amps
Applications
• MCP6491/2/4: 7.5 MHz, Low-Input Bias Current
Op Amps
• Photodiode Amplifier
• pH Electrode Amplifier
• Low Leakage Amplifier
• Piezoelectric Transducer Amplifier
• Active Analog Filter
• Battery-Powered Signal Conditioning
Design Aids
• SPICE Macro Models
• FilterLab® Software
• MAPS (Microchip Advanced Part Selector)
• Analog Demonstration and Evaluation Boards
• Application Notes
Package Types
MCP6482
MCP6481
MCP6484
MCP6482
SOIC, MSOP
SOIC, TSSOP
2x3 TDFN*
SC70, SOT-23
V
1
2
3
5 V
4 V
V
OUTA
1
8
V
OUTA
V
1
2
3
4
8 V
V
14 V
OUTD
OUT
1
2
3
4
5
DD
OUTA
DD
DD
V
V
13
–
V
V
–
+
7
6
SS
V
–
+
2
7 V
6 V
IND
OUTB
V
–
+
INA
INA
EP
9
OUTB
INA
–
V
+
IN
V
12 V
11 V
10 V
+
IN
V
–
INB
V
3
4
–
V
INA
IND
INA
INB
INA
V
5 V
+
V
DD
5
V
V
+
SS
INB
SS
SS
INB
V
+
+
INB
INC
9
8
V
–
VINB
–
6
7
INC
V
V
OUTC
* Includes Exposed Thermal Pad (EP); see Table 3-1.
OUTB
2012-2013 Microchip Technology Inc.
DS20002322C-page 1