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MCM6946YJ10R PDF预览

MCM6946YJ10R

更新时间: 2024-11-07 22:09:35
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 存储内存集成电路静态存储器光电二极管输出元件输入元件信息通信管理
页数 文件大小 规格书
11页 176K
描述
512K x 9 Bit Fast Static Random Access Memory

MCM6946YJ10R 技术参数

生命周期:Obsolete零件包装代码:SOJ
包装说明:SOJ,针数:36
Reach Compliance Code:unknownECCN代码:3A991.B.2.A
HTS代码:8542.32.00.41风险等级:5.22
Is Samacsys:N最长访问时间:10 ns
其他特性:TTL COMPATIBLE INPUTS/OUTPUTSJESD-30 代码:R-PDSO-J36
JESD-609代码:e0长度:23.5 mm
内存密度:4194304 bit内存集成电路类型:STANDARD SRAM
内存宽度:8功能数量:1
端口数量:1端子数量:36
字数:524288 words字数代码:512000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:512KX8
输出特性:3-STATE可输出:YES
封装主体材料:PLASTIC/EPOXY封装代码:SOJ
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
并行/串行:PARALLEL认证状态:Not Qualified
座面最大高度:3.76 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3.135 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:BICMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:J BEND端子节距:1.27 mm
端子位置:DUAL宽度:10.16 mm
Base Number Matches:1

MCM6946YJ10R 数据手册

 浏览型号MCM6946YJ10R的Datasheet PDF文件第2页浏览型号MCM6946YJ10R的Datasheet PDF文件第3页浏览型号MCM6946YJ10R的Datasheet PDF文件第4页浏览型号MCM6946YJ10R的Datasheet PDF文件第5页浏览型号MCM6946YJ10R的Datasheet PDF文件第6页浏览型号MCM6946YJ10R的Datasheet PDF文件第7页 
Order this document  
by MCM6946/D  
SEMICONDUCTOR TECHNICAL DATA  
MCM6946  
Advance Information  
512K x 8 Bit Static Random  
Access Memory  
The MCM6946 is a 4,194,304–bit static random access memory organized as  
524,288 words of 8 bits. Static design eliminates the need for external clocks or  
timing strobes.  
YJ PACKAGE  
400 MIL SOJ  
CASE 893–02  
The MCM6946 is equipped with chip enable (E) and output enable (G) pins,  
allowing for greater system flexibility and eliminating bus contention problems.  
Either input, when high, will force the outputs into high–impedance.  
TheMCM6946isavailableina400mil, 36–leadsurface–mountSOJpackage.  
TS PACKAGE  
44–LEAD  
TSOP TYPE II  
CASE 924A–02  
Single 3.3 V – 5%, + 10% Power Supply  
Fast Access Time: 8/10/12/15 ns  
Equal Address and Chip Enable Access Time  
All Inputs and Outputs are TTL Compatible  
Three–State Outputs  
PIN NAMES  
A0 – A18 . . . . . . . . . . . . . . . Address Inputs  
W . . . . . . . . . . . . . . . . . . . . . . . Write Enable  
G . . . . . . . . . . . . . . . . . . . . . Output Enable  
E . . . . . . . . . . . . . . . . . . . . . . . . Chip Enable  
DQ . . . . . . . . . . . . . . . . . Data Input/Output  
NC . . . . . . . . . . . . . . . . . . . . No Connection  
Power Operation: 195/185/180/175 mA Maximum, Active AC  
Available in TSOP or SOJ Packages  
V
CC  
V
SS  
. . . . . . . . . . . . . + 3.3 V Power Supply  
. . . . . . . . . . . . . . . . . . . . . . . . . Ground  
This document contains information on a new product. Specifications and information herein are subject to change without notice.  
REV 5  
3/31/98  
Motorola, Inc. 1998  

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