Datasheet > MCM63R918FC4.0

MCM63R918FC4.0

更新时间： 2024-11-25 02:59:59

品牌	Logo	应用领域
飞思卡尔 - FREESCALE		内存集成电路静态存储器
页数	文件大小	规格书
21页	346K
描述
MCM63R836

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数据手册

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MCM63R918FC4.0 数据手册

Freescale Semiconductor, Inc.

SEMICONDUCTOR TECHNICAL DATA

MOTOROLA

Order this document

by MCM63R836/D

MCM63R836

MCM63R918

8M Late Write HSTL

The MCM63R836/918 is an 8M–bit synchronous late write fast static RAM

designed to provide high performance in secondary cache and ATM switch,

Telecom, and other high speed memory applications. The MCM63R918

(organized as 512K words by 18 bits) and the MCM63R836 (organized as 256K

words by 36 bits) are fabricated in Motorola’s high performance silicon gate

CMOS technology.

The differential clock (CK) inputs control the timing of read/write operations of

theRAM. AttherisingedgeofCK;alladdresses, writeenables, andsynchronous

selects are registered. An internal buffer and special logic enable the memory to

accept write data on the rising edge of CK, a cycle after address and control

signals. Read data is also driven on the rising edge of CK.

FC PACKAGE

PBGA

CASE 999D–01

The RAM uses HSTL inputs and outputs. The adjustable input trip–point (V

)

ref

and output voltage (V

) gives the system designer greater flexibility in

DDQ

optimizing system performance.

The synchronous write and byte enables allow writing to individual bytes or the

entire word.

The impedance of the output buffers is programmable, allowing the outputs to

match the impedance of the circuit traces which reduces signal reflections.

•

Byte Write Control

2.5 V – 5% to 3.3 V + 10% Operation

HSTL — I/O (JEDEC Standard JESD8–6 Class I Compatible)

HSTL — User Selectable Input Trip–Point

HSTL — Compatible Programmable Impedance Output Drivers

Boundary Scan (JTAG) IEEE 1149.1 Compatible

Differential Clock Inputs

Optional x18 or x36 Organization

MCM63R836/918–3.0 = 3.0 ns

MCM63R836/918–3.3 = 3.3 ns

MCM63R836/918–3.7 = 3.7 ns

MCM63R836/918–4.0 = 4.0 ns

•

Sleep Mode Operation (ZZ pin)

119–Bump, 50 mil (1.27 mm) Pitch, 14 mm x 22 mm Flipped Chip Plastic

Ball Grid Array (PBGA)

REV 1

10/12/00

Motorola, Inc. 2000

MOTOROLA FAST SRAM

MCM63R836•MCM63R918

For More Information On This Product,

Go to: www.freescale.com

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与MCM63R918FC4.0相关器件

型号	品牌	获取价格	描述	数据表
MCM63R918FC4.0R	FREESCALE	获取价格	MCM63R836
MCM63R918FC4.4	MOTOROLA	获取价格	Late-Write SRAM, 512KX18, 2.2ns, CMOS, PBGA119, 14 X 22 MM, 1.27 MM PITCH, PLASTIC, FLIP C
MCM63R918RS3.0	MOTOROLA	获取价格	512KX18 LATE-WRITE SRAM, 1.5ns, CBGA119, 14 X 22 MM, 1.27 MM PITCH, CERAMIC, FLIP CHIP, BG
MCM63R918RS3.0R	MOTOROLA	获取价格	Late-Write SRAM, 512KX18, 1.5ns, CMOS, CBGA119, 14 X 22 MM, 1.27 MM PITCH, CERAMIC, FLIP C
MCM63R918RS3.3	MOTOROLA	获取价格	Late-Write SRAM, 512KX18, 1.65ns, CMOS, CBGA119, 14 X 22 MM, 1.27 MM PITCH, CERAMIC, FLIP
MCM63R918RS3.3R	MOTOROLA	获取价格	512KX18 LATE-WRITE SRAM, 1.65ns, CBGA119, 14 X 22 MM, 1.27 MM PITCH, CERAMIC, FLIP CHIP, B
MCM63R918RS4.0	MOTOROLA	获取价格	Late-Write SRAM, 512KX18, 2ns, CMOS, CBGA119, 14 X 22 MM, 1.27 MM PITCH, CERAMIC, FLIP CHI
MCM63R918RS4.4	MOTOROLA	获取价格	Late-Write SRAM, 512KX18, 2.2ns, CMOS, CBGA119, 14 X 22 MM, 1.27 MM PITCH, CERAMIC, FLIP C
MCM63R918RS4.4R	MOTOROLA	获取价格	512KX18 LATE-WRITE SRAM, 2.2ns, CBGA119, 14 X 22 MM, 1.27 MM PITCH, CERAMIC, FLIP CHIP, BG
MCM63Z736	MOTOROLA	获取价格	128K x 36 and 256K x 18 Bit Pipelined ZBT RAM Synchronous Fast Static RAM

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