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MCM63Z737TQ11R PDF预览

MCM63Z737TQ11R

更新时间: 2024-11-25 11:05:59
品牌 Logo 应用领域
飞思卡尔 - FREESCALE 内存集成电路静态存储器
页数 文件大小 规格书
20页 222K
描述
128K x 36 and 256K x 18 Bit Flow-Through ZBT RAM Synchronous Fast Static RAM

MCM63Z737TQ11R 数据手册

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Order this document  
by MCM63Z737/D  
SEMICONDUCTOR TECHNICAL DATA  
MCM63Z737  
MCM63Z819  
Advance Information  
128K x 36 and 256K x 18 Bit  
Flow–Through ZBT RAM  
Synchronous Fast Static RAM  
The ZBT RAM is a 4M–bit synchronous fast static RAM designed to provide  
zero bus turnaround. The ZBT RAM allows 100% use of bus cycles during  
back–to–back read/write and write/read cycles. The MCM63Z737 is organized  
as 128K words of 36 bits each and the MCM63Z819 is organized as 256K words  
of 18 bits each, fabricated with high performance silicon gate CMOS technology.  
This device integrates input registers, a 2–bit address counter, and high speed  
SRAM onto a single monolithic circuit for reduced parts count in communication  
applications. Synchronous design allows precise cycle control with the use of an  
external clock (CK). CMOS circuitry reduces the overall power consumption of  
the integrated functions for greater reliability.  
TQ PACKAGE  
TQFP  
CASE 983A–01  
Addresses (SA), data inputs (DQ), and all control signals except output enable  
(G) and linear burst order (LBO) are clock (CK) controlled through positive–  
edge–triggered noninverting registers.  
Write cycles are internally self–timed and are initiated by the rising edge of the  
clock (CK) input. This feature eliminates complex off–chip write pulse generation  
and provides increased timing flexibility for incoming signals.  
For read cycles, a flow–through SRAM allows output data to simply flow freely  
from the memory array.  
3.3 V LVTTL and LVCMOS Compatible  
MCM63Z737/MCM63Z819–11 = 11 ns Access/15 ns Cycle (66 MHz)  
MCM63Z737/MCM63Z819–15 = 15 ns Access/20 ns Cycle (50 MHz)  
Selectable Burst Sequencing Order (Linear/Interleaved)  
Internally Self–Timed Write Cycle  
Single–Cycle Deselect  
Byte Write Control  
ADV Controlled Burst  
100–Pin TQFP Package  
ZBT and Zero Bus Turnaround are trademarks of Integrated Device Technology, Inc., and the architecture is supported by  
Micron Technology, Inc. and Motorola, Inc.  
This document contains information on a new product. Specifications and information herein are subject to change without notice.  
2/6/98  
Motorola, Inc. 1998  

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