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MCM36F9 PDF预览

MCM36F9

更新时间: 2024-11-06 22:40:15
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA /
页数 文件大小 规格书
11页 127K
描述
1MB and 2MB Synchronous Fast Static RAM Module

MCM36F9 数据手册

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Order this document  
by MCM36F8/D  
SEMICONDUCTOR TECHNICAL DATA  
MCM36F8  
MCM36F9  
Advance Information  
1MB and 2MB Synchronous  
Fast Static RAM Module  
TheMCM36F8(1MB)isconfiguredas256Kx36bitsandtheMCM36F9(2MB)  
is configured as 512K x 36 bits. Both are packaged in a 144–pin dual–in–line  
memory module (DIMM). Each module uses Motorola’s 3.3 V 256K x 18 bit flow–  
through BurstRAMs.  
144–LEAD DIMM  
CASE 1154–01  
TOP VIEW  
143  
Address (A), data inputs (DQ, DP), and all control signals except output enable  
(G) are clock (K) controlled through positive–edge–triggered noninverting  
registers.  
Write cycles are internally self–timed and initiated by the rising edge of the  
clock (K) input. This feature provides increased timing flexibility for incoming  
signals. Synchronous byte write (BWx) and global byte write (WE) allows writes  
to either individual bytes or to both bytes.  
61  
59  
Single 3.3 V + 10%, – 5% Power Supply  
Multiple Clock Pins for Reduced Loading  
All Inputs and Outputs are LVTTL Compatible  
Byte Write and Global Write Capability  
Fast SRAM Access Times: 10 ns  
Berg Connector, Part Number: 61178–31844  
144–Pin DIMM Module  
1
This document contains information on a new product. Specifications and information herein are subject to change without notice.  
2/10/98  
Motorola, Inc. 1998  

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