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MCIMX507CVM8B PDF预览

MCIMX507CVM8B

更新时间: 2024-11-05 20:40:27
品牌 Logo 应用领域
恩智浦 - NXP 外围集成电路
页数 文件大小 规格书
136页 1912K
描述
i.MX50 32-bit MPU, ARM Cortex-A8 core, 800MHz, MAPBGA 400

MCIMX507CVM8B 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:BGA
包装说明:17 X 17 MM, 0.5 MM PITCH, ROHS COMPLIANT, PLASTIC, MABGA-400针数:400
Reach Compliance Code:unknownECCN代码:5A002
HTS代码:8542.31.00.01风险等级:4.47
其他特性:ALSO OPERATES AT 0.9 V MINIMUM SUPPLY 24 MHZJESD-30 代码:S-PBGA-B400
JESD-609代码:e1长度:17 mm
湿度敏感等级:3端子数量:400
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:LFBGA
封装等效代码:BGA400,20X20,32封装形状:SQUARE
封装形式:GRID ARRAY, LOW PROFILE, FINE PITCH峰值回流温度(摄氏度):260
电源:0.95/1.225 V认证状态:Not Qualified
座面最大高度:1.6 mm子类别:Graphics Processors
最大压摆率:185 mA最大供电电压:1.275 V
最小供电电压:1.175 V标称供电电压:1.225 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Silver/Copper (Sn/Ag/Cu)
端子形式:BALL端子节距:0.8 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:40
宽度:17 mmuPs/uCs/外围集成电路类型:MICROPROCESSOR CIRCUIT
Base Number Matches:1

MCIMX507CVM8B 数据手册

 浏览型号MCIMX507CVM8B的Datasheet PDF文件第2页浏览型号MCIMX507CVM8B的Datasheet PDF文件第3页浏览型号MCIMX507CVM8B的Datasheet PDF文件第4页浏览型号MCIMX507CVM8B的Datasheet PDF文件第5页浏览型号MCIMX507CVM8B的Datasheet PDF文件第6页浏览型号MCIMX507CVM8B的Datasheet PDF文件第7页 
Document Number: IMX50CEC  
Rev. 7, 10/2013  
Freescale Semiconductor  
Data Sheet: Technical Data  
MCIMX50  
Package Information  
Plastic Package  
i.MX50 Applications  
Processors for  
Case 416 MAPBGA 13 x 13 mm, 0.5 mm pitch  
Case 416 PoPBGA 13 x 13 mm, 0.5 mm pitch  
Case 400 MAPBGA 17 x 17 mm, 0.8 mm pitch  
Consumer Products  
Ordering Information  
See Table 1 on page 7 for ordering information.  
1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
1.1. Product Overview . . . . . . . . . . . . . . . . . . . . . . . . . . 2  
1.2. Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
1.3. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 7  
1.4. Part Number Feature Comparison . . . . . . . . . . . . . 8  
1.5. Package Feature Comparison . . . . . . . . . . . . . . . . 9  
2. Architectural Overview . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
2.1. Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
3. Modules List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
3.1. Special Signal Considerations . . . . . . . . . . . . . . . 17  
4. Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 20  
4.1. Chip-Level Conditions . . . . . . . . . . . . . . . . . . . . . 21  
4.2. Supply Power-Up/Power-Down Requirements and  
Restrictions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29  
4.3. I/O DC Parameters . . . . . . . . . . . . . . . . . . . . . . . . 31  
4.4. Output Buffer Impedance Characteristics . . . . . . 37  
4.5. I/O AC Parameters . . . . . . . . . . . . . . . . . . . . . . . . 41  
4.6. System Modules Timing . . . . . . . . . . . . . . . . . . . . 48  
4.7. External Interface Module (EIM) . . . . . . . . . . . . . . 60  
4.8. DRAM Timing Parameters . . . . . . . . . . . . . . . . . . 68  
4.9. External Peripheral Interfaces . . . . . . . . . . . . . . . 73  
5. Package Information and Contact Assignments . . . . . 101  
5.1. 13 x 13 mm, 0.5 mm Pitch, 416 Pin MAPBGA Package  
Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101  
1 Introduction  
The i.MX50 applications processors are  
multimedia-focused products offering high-performance  
processing optimized for lowest power consumption.  
The i.MX50 processors are Freescale Energy Efficiency  
Solutions products.  
The i.MX50 is optimized for portable multimedia  
applications and features Freescale’s advanced  
implementation of the ARM Cortex-A8 core, which  
®
operates at speeds as high as 1 GHz. The i.MX50  
provides a powerful display architecture, including a 2D  
Graphics Processing Unit (GPU) and Pixel Processing  
Pipeline (ePXP). Additionally, the i.MX50 includes a  
complete integration of the electrophoretic display  
function. The i.MX50 supports DDR2, LPDDR2, and  
LPDDR1 DRAM at clock rate up to 266 MHz to enable  
a range of performance and power trade-offs.  
5.2. 13 x 13 mm, 0.5 mm Pitch, 416 Pin PoPBGA Package  
Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109  
5.3. 17 x 17 mm, 0.8 mm Pitch, 400 Pin MAPBGA Package  
Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116  
5.4. Signal Assignments . . . . . . . . . . . . . . . . . . . . . . 124  
6. Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134  
The flexibility of the i.MX50 architecture allows it to be  
used in a variety of applications. As the heart of the  
Freescale reserves the right to change the detail specifications as may be required  
to permit improvements in the design of its products.  
© 2011–2013 Freescale Semiconductor, Inc. All rights reserved.  
 

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IC,GRAPHICS PROCESSOR,CMOS,BGA,529PIN,PLASTIC