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MCIMX508CVK8B PDF预览

MCIMX508CVK8B

更新时间: 2024-02-25 06:26:32
品牌 Logo 应用领域
飞思卡尔 - FREESCALE 外围集成电路
页数 文件大小 规格书
134页 2581K
描述
i.MX50 Applications Processors for Consumer Products

MCIMX508CVK8B 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:BGA
包装说明:13 X 13 MM, 0.5 MM PITCH, ROHS COMPLIANT, PLASTIC, MABGA-416针数:416
Reach Compliance Code:unknownECCN代码:5A002
HTS代码:8542.31.00.01风险等级:5.72
其他特性:ALSO OPERATES AT 0.9 V MINIMUM SUPPLY 24 MHZJESD-30 代码:S-PBGA-B416
JESD-609代码:e1长度:13 mm
湿度敏感等级:3端子数量:416
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:LFBGA
封装等效代码:BGA416,24X24,20封装形状:SQUARE
封装形式:GRID ARRAY, LOW PROFILE, FINE PITCH峰值回流温度(摄氏度):260
电源:0.95/1.225 V认证状态:Not Qualified
座面最大高度:1.52 mm子类别:Graphics Processors
最大压摆率:185 mA最大供电电压:1.275 V
最小供电电压:1.175 V标称供电电压:1.225 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Silver/Copper (Sn/Ag/Cu)
端子形式:BALL端子节距:0.5 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:40
宽度:13 mmuPs/uCs/外围集成电路类型:MICROPROCESSOR CIRCUIT
Base Number Matches:1

MCIMX508CVK8B 数据手册

 浏览型号MCIMX508CVK8B的Datasheet PDF文件第2页浏览型号MCIMX508CVK8B的Datasheet PDF文件第3页浏览型号MCIMX508CVK8B的Datasheet PDF文件第4页浏览型号MCIMX508CVK8B的Datasheet PDF文件第5页浏览型号MCIMX508CVK8B的Datasheet PDF文件第6页浏览型号MCIMX508CVK8B的Datasheet PDF文件第7页 
Document Number: IMX50CEC  
Rev. 2, 05/2012  
Freescale Semiconductor  
Data Sheet: Technical Data  
MCIMX50  
Package Information  
Plastic Package  
i.MX50 Applications  
Processors for  
Case 416 MAPBGA 13 x 13 mm, 0.5 mm pitch  
Case 416 PoPBGA 13 x 13 mm, 0.5 mm pitch  
Case 400 MAPBGA 17 x 17 mm, 0.8 mm pitch  
Consumer Products  
Ordering Information  
See Table 1 on page 7 for ordering information.  
1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
1.1. Product Overview . . . . . . . . . . . . . . . . . . . . . . . . . . 2  
1.2. Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
1.3. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 7  
1.4. Part Number Feature Comparison . . . . . . . . . . . . . 7  
1.5. Package Feature Comparison . . . . . . . . . . . . . . . . 8  
2. Architectural Overview . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
2.1. Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
3. Modules List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
3.1. Special Signal Considerations . . . . . . . . . . . . . . . 17  
4. Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 20  
4.1. Chip-Level Conditions . . . . . . . . . . . . . . . . . . . . . 21  
4.2. Supply Power-Up/Power-Down Requirements and  
Restrictions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28  
4.3. I/O DC Parameters . . . . . . . . . . . . . . . . . . . . . . . . 30  
4.4. Output Buffer Impedance Characteristics . . . . . . 36  
4.5. I/O AC Parameters . . . . . . . . . . . . . . . . . . . . . . . . 40  
4.6. System Modules Timing . . . . . . . . . . . . . . . . . . . . 47  
4.7. External Interface Module (EIM) . . . . . . . . . . . . . . 59  
4.8. DRAM Timing Parameters . . . . . . . . . . . . . . . . . . 67  
4.9. External Peripheral Interfaces . . . . . . . . . . . . . . . 72  
5. Package Information and Contact Assignments . . . . . 100  
5.1. 13 x 13 mm, 0.5 mm Pitch, 416 Pin MAPBGA Package  
Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100  
1 Introduction  
The i.MX50 Applications Processors (i.MX50)  
represent Freescale Semiconductor’s latest addition to a  
growing family of multimedia-focused products,  
offering high performance processing optimized for  
lowest power consumption.  
The i.MX50 is optimized for portable multimedia  
applications and it features Freescale’s advanced  
implementation of the ARM Cortex-A8™ core, which  
operates at speed as high as 800 MHz. The i.MX50  
provides a powerful display architecture, including a 2D  
Graphics Processing Unit (GPU) and Pixel Processing  
Pipeline (ePXP). In addition, i.MX508 includes a  
complete integration of the electrophoretic display  
function. The i.MX50 supports DDR2, LPDDR2, and  
LPDDR1 DRAM at clock rate up to 266 MHz to enable  
a range of performance and power trade-offs.  
5.2. 13 x 13 mm, 0.5 mm Pitch, 416 Pin PoPBGA Package  
Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108  
5.3. 17 x 17 mm, 0.8 mm Pitch, 400 Pin MAPBGA Package  
Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115  
5.4. Signal Assignments . . . . . . . . . . . . . . . . . . . . . . 123  
6. Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133  
The flexibility of the i.MX50 architecture allows it to be  
used in a variety of applications. As the heart of the  
application chipset, the i.MX50 provides a rich set of  
interfaces for connecting peripherals, such as WLAN,  
Bluetooth™, GPS, and displays.  
© 2012 Freescale Semiconductor, Inc. All rights reserved.  
Freescale reserves the right to change the detail specifications as may be required to permit improvements  
in the design of its products.  

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