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MCF5251VM140 PDF预览

MCF5251VM140

更新时间: 2024-11-16 02:55:19
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飞思卡尔 - FREESCALE /
页数 文件大小 规格书
32页 651K
描述
ColdFire Processor

MCF5251VM140 数据手册

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Document Number: MCF5251  
Rev. 2.1, 08/2006  
Freescale Semiconductor  
Data Sheet: Technical Data  
MCF5251  
Package Information  
MAPBGA–225  
MCF5251 ColdFire  
Processor  
Ordering Information: See Table 1 on page 2  
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
1.1 Orderable Part Numbers . . . . . . . . . . . . . . 2  
1.2 Block Diagram . . . . . . . . . . . . . . . . . . . . . . 3  
1 Introduction  
This document provides an overview of the MCF5251  
ColdFire processor and general descriptions of the  
MCF5251 features and modules. Also provided are  
electrical specifications, pin assignments, and package  
diagrams for MCF5251 ColdFire Processor. For  
functional characteristics, refer to the MCF5251  
Reference Manual (MCF5251RM).  
2 Functional Description and Application  
Information  
4
2.1 MCF5251 ColdFire® Core . . . . . . . . . . . . . 4  
2.2 Module Inventory . . . . . . . . . . . . . . . . . . . . 4  
®
3 Signal Description . . . . . . . . . . . . . . . . . . . . . . 6  
4 Electrical Specifications . . . . . . . . . . . . . . . . . 11  
4.1 SDRAM Bus Timing . . . . . . . . . . . . . . . . . 14  
4.2 SPDIF Timing . . . . . . . . . . . . . . . . . . . . . . 15  
4.3 Serial Audio Interface Timing . . . . . . . . . . 16  
4.4 DDATA/PST/PSTCLK Debug Interface . . 16  
4.5 BDM and JTAG Timing . . . . . . . . . . . . . . 16  
The MCF5251 is a system controller/decoder for  
compressed audio music players addressing both  
portable and automotive solutions supporting CD, HDD  
and USB based systems. The 32-bit ColdFire core with  
enhanced multiply and accumulate (eMAC) unit  
provides optimum performance and code density for the  
combination of control code and signal processing  
required for compressed audio decode, file management,  
and system control.  
5 Package Information and Pinout . . . . . . . . . . 18  
5.1 Pin Assignment . . . . . . . . . . . . . . . . . . . . 18  
5.2 Package Drawing . . . . . . . . . . . . . . . . . . . 24  
6 Product Documentation . . . . . . . . . . . . . . . . . 31  
6.1 Revision History . . . . . . . . . . . . . . . . . . . . 31  
Low power features include flexible PLL (with  
power-down mode) with dynamic clock switching, a  
hardwired CD ROM decoder, advanced 0.13 µm CMOS  
process technology, 1.2 V core power supply, and  
on-chip 128K-byte SRAM.  
Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its  
products.  
© Freescale Semiconductor, Inc., 2005, 2006. All rights reserved.  

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