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MCF5272CVF66 PDF预览

MCF5272CVF66

更新时间: 2024-09-28 12:26:31
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飞思卡尔 - FREESCALE 外围集成电路微处理器时钟
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12页 331K
描述
MCF5272 Integrated Microprocessor Product Brief

MCF5272CVF66 数据手册

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Freescale Semiconductor, Inc.  
Advance Information  
MCF5272PB/D  
Rev.0, 1/2002  
MCF5272 Integrated  
Microprocessor Product Brief  
This document provides an overview of the MCF5272 microprocessor features, including the  
major functional components.  
1.1 Features  
A block diagram of the MCF5272 is shown in Figure 1. The main features are as follows:  
Static Version 2 ColdFire variable-length RISC processor  
— 32-bit address and data path on-chip  
— 66-MHz processor core and bus frequency  
— Sixteen general-purpose 32-bit data and address registers  
— Multiply-accumulate unit (MAC) for DSP and fast multiply operations  
— 63 Dhrystone 2.1 MIPS at 66 MHz  
On-chip memories  
— 4-Kbyte SRAM on CPU internal bus  
— 16-Kbyte ROM on CPU internal bus  
— 1-Kbyte instruction cache  
Power management  
— Fully-static operation with processor sleep and whole-chip stop modes  
Very rapid response to interrupts from the low-power sleep mode (wake-up  
feature)  
— Clock enable/disable for each peripheral when not used  
— Software-controlled disable of external clock input for virtually zero power  
consumption (low-power stop mode)  
Two universal asynchronous/synchronous receiver transmitters (UARTs)  
— Full-duplex operation  
— Based on MC68681 dual-UART (DUART) programming model  
— Flexible baud rate generator  
— Modem control signals available (CTS and RTS)  
— Processor interrupt and wake-up capability  
— Enhanced Tx, Rx FIFOs, 24 bytes each  
For More Information On This Product,  
Go to: www.freescale.com  

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