Datasheet > MC8610TPX1067J

MC8610TPX1067J

更新时间： 2024-11-07 11:07:11

品牌	Logo	应用领域
飞思卡尔 - FREESCALE		/
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Integrated Host Processor Hardware Specifications

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MC8610TPX1067J 数据手册

Freescale Semiconductor

Data Sheet

Document Number: MPC8610EC

Rev. 0, 10/2008

MPC8610 Integrated Host Processor

Hardware Specifications

Features

– Boot sequencer

– Optionally loads configuration data from serial ROM at

• High-performance, 32-bit e600 core, that implements the

Power Architecture™ technology

– Eleven execution units and three register files

– Two separate 32-Kbyte instruction and data level 1 (L1)

caches

reset via I C interface

– Can be used to initialize configuration registers and/or

memory

– Supports extended I C addressing mode

• DUART

• Fast InfraRed interface

• Serial peripheral interface

– Integrated 256-Kbyte, eight-way set-associative unified

instruction and data level 2 (L2) cache with ECC

– 36-bit real addressing

– Master or slave support

– Multiprocessing support features

– Power and thermal management

• MPX coherency module (MCM)

• Address translation and mapping units (ATMUs)

• DDR/DDR2 memory controller

– 64- or 32-bit data path (72-bit with ECC)

– Up to 533-MHz DDR2 data rate and up to 400 MHz

DDR data rate

• Dual integrated four-channel DMA controllers

– All channels accessible by both local and remote masters

– Supports transfers to or from any local memory or I/O

port

– Ability to start and flow control each DMA channel

from external 3-pin interface

• Watchdog timer

• Dual global timer modules

– Up to 16 Gbytes memory

• 32-bit PCI interface, 33 or 66 MHz bus frequency

• Dual PCI Express® controllers

• Enhanced local bus controller (eLBC)

– Operating at up to 133 MHz

– PCI Express 1.0a compatible

– Eight chip selects

– PCI Express controller 1 supports x1, x2, and x4 link

widths; PCI Express controller 2 supports x1, x2, x4, and

x8 link widths

• Display interface unit

– Maximum display resolution: 1280 × 1024

– Maximum display refresh rate: 60 Hz

– Display color depth: up to 24 bpp

– Display interface: parallel TTL

• OpenPIC-compliant programmable interrupt controller

(PIC)

– 2.5 Gbaud, 2.0 Gbps lane

• Device performance monitor

– Supports eight 32-bit counters that count the occurrence

of selected events

– Ability to count up to 512 counter-specific events

– Supports 64 reference events that can be counted on any

of the 8 counters

– Supports 16 programmable interrupt and processor task

priority levels

– Supports 12 discrete external interrupts and 48 internal

interrupts

– Eight global high resolution timers/counters that can

generate interrupts

– Supports duration and quantity threshold counting

– Burstiness feature that permits counting of burst events

with a programmable time between bursts

– Triggering and chaining capability

– Ability to generate an interrupt on overflow

• IEEE Std 1149.1™ compliant, JTAG boundary scan

• Available as 783-pin, flip-chip, plastic ball grid array

(FC-PBGA)

– Support for PCI Express message-shared interrupts

(MSIs)

• Dual I C controllers

– Master or slave I C mode support

12 3 4 5 6 7...96

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与MC8610TPX1067J相关器件

型号	品牌	获取价格	描述	数据表
MC8610TPX800G	FREESCALE	获取价格	Integrated Host Processor Hardware Specifications
MC8610TPX800GB	NXP	获取价格	REV 1.1, 8610, 1.0V,-40C/105C
MC8610TPX800GZ	FREESCALE	获取价格	MPC8610 Integrated Host Processor Hardware Specifications
MC8610TPX800J	FREESCALE	获取价格	Integrated Host Processor Hardware Specifications
MC8610TVT1066JB	NXP	获取价格	IC,MICROPROCESSOR,32-BIT,BGA,783PIN,PLASTIC
MC8610TVT1066JZ	FREESCALE	获取价格	MPC8610 Integrated Host Processor Hardware Specifications
MC8610TVT1067G	FREESCALE	获取价格	Integrated Host Processor Hardware Specifications
MC8610TVT1067J	FREESCALE	获取价格	Integrated Host Processor Hardware Specifications
MC8610TVT800G	FREESCALE	获取价格	Integrated Host Processor Hardware Specifications
MC8610TVT800GB	NXP	获取价格	IC,MICROPROCESSOR,32-BIT,BGA,783PIN,PLASTIC

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