ON Semiconductort
MC74VHC04
Hex Inverter
The MC74VHC04 is an advanced high speed CMOS inverter
fabricated with silicon gate CMOS technology. It achieves high speed
operation similar to equivalent Bipolar Schottky TTL while
maintaining CMOS low power dissipation.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7V, allowing the interface of 5V systems
to 3V systems.
D SUFFIX
14−LEAD SOIC PACKAGE
CASE 751A−03
• High Speed: t = 3.8ns (Typ) at V = 5V
PD
CC
• Low Power Dissipation: I = 2μA (Max) at T = 25°C
CC
A
DT SUFFIX
14−LEAD TSSOP PACKAGE
CASE 948G−01
• High Noise Immunity: V
= V = 28% V
NIL CC
NIH
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Designed for 2V to 5.5V Operating Range
• Low Noise: V
= 0.8V (Max)
OLP
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300mA
• ESD Performance: HBM > 2000V; Machine Model > 200V
• Chip Complexity: 36 FETs or 9 Equivalent Gates
M SUFFIX
14−LEAD SOIC EIAJ PACKAGE
CASE 965−01
w These devices are available in Pb−free package(s). Specifications herein
apply to both standard and Pb−free devices. Please see our website at
www.onsemi.com for specific Pb−free orderable part numbers, or
contact your local ON Semiconductor sales office or representative.
ORDERING INFORMATION
MC74VHCXXD
MC74VHCXXDT
MC74VHCXXM
SOIC
TSSOP
SOIC EIAJ
FUNCTION TABLE
Inputs
A
Outputs
Y
1
3
5
2
4
6
A1
A2
A3
Y1
Y2
Y3
L
H
L
H
V
A6
13
Y6
12
A5
11
Y5
10
A4
9
Y4
8
CC
Y = A
14
9
8
10
12
A4
A5
A6
Y4
Y5
Y6
11
13
1
2
3
4
5
6
7
A1
Y1
A2
Y2
A3
Y3 GND
Figure 1. LOGIC DIAGRAM
Figure 2. Pinout: 14−Lead Packages (Top View)
© Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
March, 2006 − Rev. 4
MC74VHC04/D