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MC74VHCU04ML2 PDF预览

MC74VHCU04ML2

更新时间: 2024-11-25 14:53:15
品牌 Logo 应用领域
安森美 - ONSEMI 输入元件光电二极管逻辑集成电路触发器
页数 文件大小 规格书
7页 134K
描述
AHC/VHC SERIES, HEX 1-INPUT INVERT GATE, PDSO14, EIAJ, SOIC-14

MC74VHCU04ML2 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:EIAJ, SOIC-14
针数:14Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.13
Is Samacsys:N系列:AHC/VHC
JESD-30 代码:R-PDSO-G14JESD-609代码:e0
长度:10.2 mm负载电容(CL):50 pF
逻辑集成电路类型:INVERTER最大I(ol):0.008 A
功能数量:6输入次数:1
端子数量:14最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP14,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:2/5.5 VProp。Delay @ Nom-Sup:8 ns
传播延迟(tpd):13 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:2.05 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:5.275 mmBase Number Matches:1

MC74VHCU04ML2 数据手册

 浏览型号MC74VHCU04ML2的Datasheet PDF文件第2页浏览型号MC74VHCU04ML2的Datasheet PDF文件第3页浏览型号MC74VHCU04ML2的Datasheet PDF文件第4页浏览型号MC74VHCU04ML2的Datasheet PDF文件第5页浏览型号MC74VHCU04ML2的Datasheet PDF文件第6页浏览型号MC74VHCU04ML2的Datasheet PDF文件第7页 
MC74VHCU04  
Hex Inverter  
(Unbuffered)  
The MC74VHCU04 is an advanced high speed CMOS unbuffered  
inverter fabricated with silicon gate CMOS technology. It achieves  
high speed operation similar to equivalent Bipolar Schottky TTL  
while maintaining CMOS low power dissipation.  
The inputs tolerate voltages up to 7.0 V, allowing the interface of  
5.0 V systems to 3.0 V systems.  
http://onsemi.com  
MARKING  
DIAGRAMS  
Features  
14  
1
SOIC14  
D SUFFIX  
CASE 751A  
High Speed: t = 3.5 ns (Typ) at V = 5.0 V  
PD  
CC  
VHCU04G  
AWLYWW  
Low Power Dissipation: I = 2 mA (Max) at T = 25°C  
CC  
A
1
High Noise Immunity: V  
= V  
= 10% V (Min.)  
NIH  
NIL  
CC  
Power Down Protection Provided on Inputs  
Balanced Propagation Delays  
14  
Designed for 2.0 V to 5.5 V Operating Range  
VHCU  
04  
TSSOP14  
DT SUFFIX  
CASE 948G  
Low Noise: V  
= 0.8 V (Max)  
OLP  
ALYWG  
1
Pin and Function Compatible with Other Standard Logic Families  
Latchup Performance Exceeds 300 mA  
G
1
ESD Performance:  
Human Body Model > 2000 V;  
Machine Model > 200 V  
14  
SOEIAJ14  
M SUFFIX  
CASE 965  
VHCU04  
ALYWG  
Chip Complexity: 12 FETs or 3 Equivalent Gates  
These Devices are PbFree and are RoHS Compliant  
1
1
A
= Assembly Location  
WL, L = Wafer Lot  
Y, YY = Year  
1
3
5
2
4
6
A1  
A2  
A3  
Y1  
Y2  
Y3  
WW, W = Work Week  
G or G = PbFree Package  
(Note: Microdot may be in either location)  
FUNCTION TABLE  
Inputs  
A
Outputs  
Y
Y = A  
9
8
10  
12  
A4  
A5  
A6  
Y4  
Y5  
Y6  
L
H
L
H
11  
13  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 4 of this data sheet.  
Figure 1. Logic Diagram  
© Semiconductor Components Industries, LLC, 2011  
1
Publication Order Number:  
May, 2011 Rev. 5  
MC74VHCU04/D  

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