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MC74LCX540MR2 PDF预览

MC74LCX540MR2

更新时间: 2024-11-21 20:00:55
品牌 Logo 应用领域
安森美 - ONSEMI 驱动光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
8页 125K
描述
LVC/LCX/Z SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDSO20, EIAJ, PLASTIC, SOIC-20

MC74LCX540MR2 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP,
针数:20Reach Compliance Code:compliant
风险等级:5.12系列:LVC/LCX/Z
JESD-30 代码:R-PDSO-G20JESD-609代码:e0
长度:12.575 mm逻辑集成电路类型:BUS DRIVER
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:INVERTED
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):NOT SPECIFIED传播延迟(tpd):7.5 ns
认证状态:Not Qualified座面最大高度:2.05 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:TIN LEAD端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:5.275 mm
Base Number Matches:1

MC74LCX540MR2 数据手册

 浏览型号MC74LCX540MR2的Datasheet PDF文件第2页浏览型号MC74LCX540MR2的Datasheet PDF文件第3页浏览型号MC74LCX540MR2的Datasheet PDF文件第4页浏览型号MC74LCX540MR2的Datasheet PDF文件第5页浏览型号MC74LCX540MR2的Datasheet PDF文件第6页浏览型号MC74LCX540MR2的Datasheet PDF文件第7页 
MC74LCX540  
Low-Voltage CMOS  
Octal Buffer  
Flow Through Pinout  
With 5 VTolerant Inputs and Outputs  
(3State, Inverting)  
http://onsemi.com  
MARKING  
The MC74LCX540 is a high performance, inverting octal buffer  
operating from a 2.3 to 3.6 V supply. This device is similar in function  
to the MC74LCX240, while providing flow through architecture.  
High impedance TTL compatible inputs significantly reduce current  
loading to input drivers while TTL compatible outputs offer improved  
DIAGRAMS  
20  
20  
1
LCX540  
switching noise performance. A V specification of 5.5 V allows  
AWLYYWWG  
I
SOIC20 WB  
DW SUFFIX  
CASE 751D  
MC74LCX540 inputs to be safely driven from 5 V devices. The  
MC74LCX540 is suitable for memory address driving and all TTL  
level bus oriented transceiver applications.  
1
Current drive capability is 24 mA at the outputs. The Output Enable  
(OE1, OE2) inputs, when HIGH, disables the outputs by placing them  
in a HIGH Z condition.  
20  
20  
1
LCX  
540  
ALYW G  
Features  
TSSOP20  
DT SUFFIX  
CASE 948E  
G
Designed for 2.3 to 3.6 V V Operation  
CC  
1
5 V Tolerant Interface Capability With 5 V TTL Logic  
Supports Live Insertion and Withdrawal  
A
L, WL  
Y, YY  
=
=
=
Assembly Location  
Wafer Lot  
I  
Specification Guarantees High Impedance When V = 0 V  
CC  
LVTTL Compatible  
OFF  
Year  
W, WW = Work Week  
G or G  
= PbFree Package  
LVCMOS Compatible  
24 mA Balanced Output Sink and Source Capability  
Near Zero Static Supply Current in All Three Logic States (10 mA)  
Substantially Reduces System Power Requirements  
Latchup Performance Exceeds 500 mA  
(Note: Microdot may be in either location)  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 3 of this data sheet.  
ESD Performance:  
Human Body Model >2000 V  
Machine Model >200 V  
These Devices are PbFree, Halogen Free/BFR Free and are RoHS  
Compliant  
© Semiconductor Components Industries, LLC, 2012  
1
Publication Order Number:  
October, 2012 Rev. 8  
MC74LCX540/D  

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