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MC74LCX2952DTR2 PDF预览

MC74LCX2952DTR2

更新时间： 2024-11-05 14:38:15
品牌 Logo 应用领域
安森美 - ONSEMI 光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
43页 383K
描述
LVC/LCX/Z SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24, PLASTIC, TSSOP-24

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中文翻译

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MC74LCX2952DTR2 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：TSSOP包装说明：TSSOP,
针数：24Reach Compliance Code：compliant
风险等级：5.56系列：LVC/LCX/Z
JESD-30 代码：R-PDSO-G24JESD-609代码：e0
长度：7.8 mm逻辑集成电路类型：REGISTERED BUS TRANSCEIVER
位数：8功能数量：1
端口数量：2端子数量：24
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：240传播延迟（tpd）：9 ns
认证状态：Not Qualified座面最大高度：1.2 mm
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：2 V
标称供电电压 (Vsup)：3.3 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：TIN LEAD端子形式：GULL WING
端子节距：0.65 mm端子位置：DUAL
处于峰值回流温度下的最长时间：30宽度：4.4 mm
Base Number Matches：1

MC74LCX2952DTR2 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
LOW–VOLTAGE CMOS  
OCTAL REGISTERED  
TRANSCEIVER  
The MC74LCX2952 is a high performance, non–inverting octal  
registered transceiver operating from a 2.7 to 3.6V supply. High  
impedance TTL compatible inputs significantly reduce current loading to  
input drivers while TTL compatible outputs offer improved switching noise  
performance. A V specification of 5.5V allows MC74LCX2952 inputs to  
I
be safely driven from 5V devices. The MC74LCX2952 is suitable for  
memory address driving and all TTL level bus oriented transceiver  
applications.  
Two 8–bit back to back registers store data from either of two  
bidirectional buses. Data applied to the inputs is entered and stored on  
the rising edge of the Clock (CAB, CBA) provided that the Clock Enable  
(CEAB, CEBA) is Low. The data is then presented at the 3–state output  
buffers, but is only accessible when the Output Enable (OEAB, OEBA) is  
Low. The operation of the MC74LCX2952 is symmetrical — A inputs to B  
outputs occurs in the same manner as B inputs to A outputs.  
DW SUFFIX  
PLASTIC SOIC  
CASE 751E–04  
24  
1
SD SUFFIX  
PLASTIC SSOP  
24  
CASE 940D–03  
• Designed for 2.7 to 3.6V V  
CC  
Operation  
1
• 5V Tolerant — Interface Capability With 5V TTL Logic  
• Supports Live Insertion and Withdrawal  
DT SUFFIX  
PLASTIC TSSOP  
CASE 948H–01  
• I  
OFF  
Specification Guarantees High Impedance When V  
= 0V  
CC  
24  
• LVTTL Compatible  
1
• LVCMOS Compatible  
• 24mA Balanced Output Sink and Source Capability  
• Near Zero Static Supply Current in All Three Logic States (10µA)  
Substantially Reduces System Power Requirements  
• Latchup Performance Exceeds 500mA  
PIN NAMES  
Pins  
• ESD Performance: Human Body Model >2000V; Machine Model >200V  
Function  
A0–A7  
B0–B7  
CAB, CBA  
CEAB, CEBA  
OEAB, OEBA  
Side A Inputs/Outputs  
Side B Inputs/Outputs  
Clock Pulse Inputs  
Clock Enable Inputs  
Output Enable Inputs  
V
A7 A6 A5 A4 A3 A2  
23 22 21 20 19 18  
A1 A0 OEBA CBA CEBA  
CC  
24  
16  
14  
17  
15  
13  
Pinout: 24–Lead Package (Top View)  
1
2
3
4
5
6
7
9
11  
8
10  
12  
B7 B6 B5 B4 B3 B2 B1  
B0 OEAB CAB CEAB GND  
This document contains information on a product under development. Motorola reserves the right to change or  
discontinue this product without notice.  
11/96  
REV 0.3  
147  
Motorola, Inc. 1996  
1234567...43

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