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MC74LCX2245DT PDF预览

MC74LCX2245DT

更新时间： 2024-01-18 22:28:36
品牌 Logo 应用领域
安森美 - ONSEMI 光电二极管
页数 文件大小 规格书
8页 82K
描述
IC,BUS TRANSCEIVER,SINGLE,8-BIT,LCX/LVC-CMOS,TSSOP,20PIN,PLASTIC

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MC74LCX2245DT 技术参数

生命周期：Obsolete包装说明：TSSOP, TSSOP20,.25
Reach Compliance Code：compliant风险等级：5.84
Is Samacsys：N控制类型：COMMON CONTROL
计数方向：BIDIRECTIONALJESD-30 代码：R-PDSO-G20
最大I（ol）：0.012 A位数：8
功能数量：1端子数量：20
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装等效代码：TSSOP20,.25封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH电源：3.3 V
Prop。Delay @ Nom-Sup：10 ns认证状态：Not Qualified
子类别：Bus Driver/Transceivers标称供电电压 (Vsup)：3.3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：GULL WING
端子节距：0.635 mm端子位置：DUAL
Base Number Matches：1

MC74LCX2245DT 数据手册

 浏览型号MC74LCX2245DT的Datasheet PDF文件第2页浏览型号MC74LCX2245DT的Datasheet PDF文件第3页浏览型号MC74LCX2245DT的Datasheet PDF文件第4页浏览型号MC74LCX2245DT的Datasheet PDF文件第5页浏览型号MC74LCX2245DT的Datasheet PDF文件第6页浏览型号MC74LCX2245DT的Datasheet PDF文件第7页 
Low-Voltage CMOS Octal  
Transceiver  
MC74LCX2245  
With 5V–Tolerant Inputs and Outputs  
(3–State, Non–Inverting)  
The MC74LCX2245 is a high performance, non–inverting octal  
transceiver operating from a 2.7 to 3.6V supply. High impedance TTL  
compatible inputs significantly reduce current loading to input drivers  
while TTL compatible outputs offer improved switching noise  
performance. A V specification of 5.5V allows MC74LCX2245  
LOW–VOLTAGE CMOS  
OCTAL TRANSCEIVER  
I
inputs to be safely driven from 5V devices. The MC74LCX2245 is  
designed to reduce output overshoot and undershoot and is suitable for  
memory address driving and all TTL level bus oriented transceiver  
applications; especially those requiring the very quiet outputs.  
Current drive capability is 12mA at both A and B ports. The  
Transmit/Receive (T/R) input determines the direction of data flow  
through the bi–directional transceiver. Transmit (active–HIGH)  
enables data from A ports to B ports; Receive (active–LOW) enables  
data from B to A ports. The Output Enable input, when HIGH,  
disables both A and B ports by placing them in a HIGH Z condition.  
DW SUFFIX  
20–LEAD PLASTIC SOIC  
CASE 751D–05  
• Designed for 2.7 to 3.6V V Operation  
CC  
• 5V Tolerant — Interface Capability With 5V TTL Logic  
• Supports Live Insertion and Withdrawal  
M SUFFIX  
20–LEAD PLASTIC SOIC EIAJ  
CASE 967–01  
• I  
Specification Guarantees High Impedance When V = 0V  
OFF  
CC  
• LVTTL Compatible  
• LVCMOS Compatible  
DT SUFFIX  
20–LEAD PLASTIC TSSOP  
CASE 948E–02  
• 12mA Balanced Output Sink and Source Capability  
• Near Zero Static Supply Current in All Three Logic States (10µA)  
Substantially Reduces System Power Requirements  
• Latchup Performance Exceeds 500mA  
• ESD Performance: Human Body Model >2000V; Machine Model >200V  
PIN NAMES  
V
OE  
19  
B0  
18  
B1  
17  
B2  
16  
B3  
15  
B4  
14  
B5  
13  
B6  
12  
B7  
11  
CC  
Pins  
Function  
20  
OE  
T/R  
A0–A7  
Output Enable Input  
Transmit/Receive Input  
Side A 3–State Inputs or 3–State  
Outputs  
B0–B7  
Side B 3–State Inputs or 3–State  
Outputs  
1
2
3
4
5
6
7
9
8
10  
T/R  
A0  
A1  
A2  
A3  
A4  
A5  
A6  
A7 GND  
Figure 1. 20–Lead Pinout  
(Top View)  
This document contains information on a new product. Specifications and information  
herein are subject to change without notice.  
Semiconductor Components Industries, LLC, 2001  
1
Publication Order Number:  
January, 2001 – Rev. 1  
MC74LCX2245/D  
12345678

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