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MC74HC162AD PDF预览

MC74HC162AD

更新时间: 2024-10-31 23:05:43
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 计数器
页数 文件大小 规格书
14页 326K
描述
Presettable Counters

MC74HC162AD 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:SOP, SOP16,.25Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.92
计数方向:UP系列:HC/UH
JESD-30 代码:R-PDSO-G16JESD-609代码:e0
长度:9.9 mm负载电容(CL):50 pF
负载/预设输入:YES逻辑集成电路类型:DECADE COUNTER
最大I(ol):0.0024 A工作模式:SYNCHRONOUS
位数:4功能数量:1
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:2/6 V
传播延迟(tpd):255 ns认证状态:Not Qualified
座面最大高度:1.75 mm子类别:Counters
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:3.9 mm
最小 fmax:28 MHzBase Number Matches:1

MC74HC162AD 数据手册

 浏览型号MC74HC162AD的Datasheet PDF文件第2页浏览型号MC74HC162AD的Datasheet PDF文件第3页浏览型号MC74HC162AD的Datasheet PDF文件第4页浏览型号MC74HC162AD的Datasheet PDF文件第5页浏览型号MC74HC162AD的Datasheet PDF文件第6页浏览型号MC74HC162AD的Datasheet PDF文件第7页 
SEMICONDUCTOR TECHNICAL DATA  
High–Performance Silicon–Gate CMOS  
The MC54/74HC160A and HC162A are identical in pinout to the LS160  
and LS162, respectively. The device inputs are compatible with standard  
CMOS outputs; with pullup resistors, they are compatible with LSTTL  
outputs.  
J SUFFIX  
CERAMIC PACKAGE  
CASE 620–10  
16  
1
The HC160A and HC162A are programmable BCD counters with  
asynchronous and synchronous Reset inputs, respectively.  
N SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
Output Drive Capability: 10 LSTTL Loads  
Outputs Directly Interface to CMOS, NMOS, and TTL  
Operating Voltage Range: 2 to 6 V  
16  
1
Low Input Current: 1 µA  
High Noise Immunity Characteristic of CMOS Devices  
In Compliance with the Requirements Defined by JEDEC Standard  
No. 7A  
D SUFFIX  
SOIC PACKAGE  
CASE 751B–05  
16  
1
Chip Complexity: 234 FETs or 58.5 Equivalent Gates  
ORDERING INFORMATION  
MC54HCXXXAJ  
MC74HCXXXAN  
MC74HCXXXAD  
Ceramic  
Plastic  
SOIC  
LOGIC DIAGRAM  
3
4
5
6
14  
13  
12  
11  
Q0  
Q1  
Q2  
Q3  
P0  
P1  
P2  
P3  
PRESENT  
DATA  
INPUTS  
BCD  
OUTPUTS  
PIN ASSIGNMENT  
RESET  
CLOCK  
1
2
16  
15  
V
CC  
RIPPLE  
CARRY OUT  
3
4
14  
13  
Q0  
P0  
P1  
P2  
P3  
RIPPLE  
CARRY  
OUT  
2
15  
CLOCK  
Q1  
5
6
12  
11  
10  
9
Q2  
Q3  
7
8
ENABLE T  
LOAD  
ENABLE P  
GND  
RESET  
LOAD  
ENABLE P  
ENABLE T  
COUNT  
ENABLES  
PIN 16 = V  
PIN 8 = GND  
CC  
FUNCTION TABLE  
Inputs  
Clock Reset* Load Enable P Enable T  
Output  
Q
Count  
Mode  
L
X
L
H
H
H
X
X
H
L
X
X
H
X
L
Reset  
Load Preset Data  
Count  
Device  
Reset Mode  
H
H
H
H
HC160  
HC162  
BCD  
BCD  
Asynchronous  
Synchronous  
No Count  
No Count  
X
* HC162A only. HC160A is an Asynchronous Reset Device  
H = high level  
L = low level  
X = don’t care  
This document contains information on a product under development. Motorola reserves the right to  
change or discontinue this product without notice.  
9/96  
REV 0  
Motorola, Inc. 1996  

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