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MC74ACT160N PDF预览

MC74ACT160N

更新时间: 2024-11-13 23:01:31
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 计数器逻辑集成电路光电二极管
页数 文件大小 规格书
14页 326K
描述
SYNCHRONOUS PRESETTABLE BCD DECADE COUNTER

MC74ACT160N 数据手册

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SYNCHRONOUS  
PRESETTABLE  
BCD DECADE COUNTER  
The MC74AC160/74ACT160 and MC74AC162/74ACT162 are high-speed  
synchronous decade counters operating in the BCD (8421) sequence. They  
are synchronously presettable for application in programmable dividers and have  
two types of Count Enable inputs plus a Terminal Count output for versatility in  
forming synchronous multistage counters. The MC74AC160/74ACT160 has an  
asynchronous Master Reset input that overrides all other inputs and forces the  
outputs LOW. The MC74AC162/74ACT162 has a Synchronous Reset input that  
overrides counting and parallel loading and allows all outputs to be simultaneously  
reset on the rising edge of the clock.  
N SUFFIX  
CASE 648-08  
PLASTIC  
Synchronous Counting and Loading  
High-Speed Synchronous Expansion  
Typical Count Rate of 120 MHz  
Outputs Source/Sink 24 mA  
• ′ACT160 and ACT162 Have TTL Compatible Inputs  
V
TC  
15  
Q
Q
Q
Q
3
CET  
10  
PE  
9
CC  
0
1
2
16  
14  
13  
12  
11  
D SUFFIX  
CASE 751B-05  
PLASTIC  
LOGIC SYMBOL  
8
1
2
3
4
5
6
7
*R  
CP  
P
P
P
P
3
CEP GND  
0
1
2
PE P  
P
P
P
0
1
2
3
PIN NAMES  
CEP  
CET  
TC  
CEP  
CET  
CP  
Count Enable Parallel Input  
Count Enable Trickle Input  
Clock Pulse Input  
CP  
*R Q  
Q
Q
Q
0
1
2
3
MR  
SR  
P –P  
0
PE  
(160) Asynchronous Master Reset Input  
(162) Synchronous Reset Input  
Parallel Data Inputs  
3
*MR for  
*SR for  
160  
Parallel Enable Input  
162  
Q –Q  
TC  
Flip-Flop Outputs  
Terminal Count Output  
0
3
FACT DATA  
5-1  

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