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MC74AC273NG

更新时间： 2024-11-09 05:09:59
品牌 Logo 应用领域
安森美 - ONSEMI 触发器
页数 文件大小 规格书
8页 112K
描述
Octal D Flip−Flop

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中文翻译

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MC74AC273NG 数据手册

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MC74AC273, MC74ACT273  
Octal D Flip−Flop  
The MC74AC273/74ACT273 has eight edge-triggered D−type  
flip−flops with individual D inputs and Q outputs. The common  
buffered Clock (CP) and Master Reset (MR) inputs load and reset  
(clear) all flip−flops simultaneously.  
The register is fully edge-triggered. The state of each D input, one  
setup time before the LOW−to−HIGH clock transition, is transferred  
to the corresponding flip−flop’s Q output.  
http://onsemi.com  
All outputs will be forced LOW independently of Clock or Data  
inputs by a LOW voltage level on the MR input. The device is useful  
for applications where the true output only is required and the Clock  
and Master Reset are common to all storage elements.  
PDIP−20  
SUFFIX N  
CASE 738  
20  
1
Features  
• Ideal Buffer for MOS Microprocessor or Memory  
• Eight Edge-Triggered D Flip−Flops  
• Buffered Common Clock  
• Buffered, Asynchronous Master Reset  
• See MC74AC377 for Clock Enable Version  
• See MC74AC373 for Transparent Latch Version  
• See MC74AC374 for 3-State Version  
• Outputs Source/Sink 24 mA  
• ′ACT273 Has TTL Compatible Inputs  
• Pb−Free Packages are Available*  
SOIC−20WB  
SUFFIX DW  
CASE 751D  
20  
1
TSSOP−20  
SUFFIX DT  
CASE 948E  
20  
1
SOEIAJ−20  
SUFFIX M  
CASE 967  
20  
V
Q
D
D
Q
Q
D
D
Q
4
CP  
11  
CC  
7
7
6
6
5
5
4
20  
19  
18  
17  
16  
15  
14  
12  
13  
1
PIN ASSIGNMENT  
PIN  
D0−D  
FUNCTION  
Data Inputs  
7
1
2
3
4
5
6
7
9
8
10  
MR  
CP  
Master Reset  
MR  
Q
D
D
Q
Q
D
D
Q
3
GND  
0
0
1
1
2
2
3
Clock Pulse Input  
Data Outputs  
(Top View)  
Q −Q  
0
7
Pinout: 20−Lead Packages Conductors  
MODE SELECT-FUNCTION TABLE  
D
D
D
D
D
D
D
D
6 7  
0
1
2
3
4
5
Inputs  
Outputs  
CP  
Operating Mode  
MR  
L
CP  
X
D
Q
n
n
MR  
Q
Q
Q
Q
Q
Q
Q
Q
6 7  
Reset (Clear)  
Load ′1′  
X
L
H
L
0
1
2
3
4
5
H
H
L
Load ′0′  
H
Logic Symbol  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 5 of this data sheet.  
H = HIGH Voltage Level  
L = LOW Voltage Level  
X = Immaterial  
= LOW-to-HIGH Clock Transition  
DEVICE MARKING INFORMATION  
See general marking information in the device marking  
section on page 6 of this data sheet.  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
December, 2005 − Rev. 6  
MC74AC273/D  
12345678

中文翻译

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MC74AC273NG 替代型号

型号 品牌 替代类型 描述 数据表
MC74AC377NG ONSEMI

类似代替

 Octal D Flip−Flop with Clock Enable
MC74AC377N ONSEMI

类似代替

 Octal D Flip-Flop with Clock Enable
MC74AC273N ONSEMI

类似代替

 OCTAL D FLIP-FLOP

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