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MC68EC030

更新时间: 2024-11-11 04:40:47
品牌 Logo 应用领域
飞思卡尔 - FREESCALE 控制器
页数 文件大小 规格书
36页 395K
描述
Second-Generation 32-Bit Enhanced Embedded Controller

MC68EC030 数据手册

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Freescale Semiconductor, Inc.  
Order this document  
by MC68EC030/D  
MOTOROLA  
SEMICONDUCTOR  
TECHNICAL DATA  
MC68EC030  
Technical Summary  
Second-Generation 32-Bit Enhanced Embedded  
Controller  
The MC68EC030 is a 32-bit embedded controller that streamlines the functionality of an MC68030 for  
the requirements of embedded control applications. The MC68EC030 is optimized to maintain  
performance while using cost-effective memory subsystems. The rich instruction set and addressing  
mode capabilities of the MC68020, MC68030, and MC68040 have been maintained, allowing a clear  
migration path for M68000 systems. The main features of the MC68EC030 are as follows:  
• Object-Code Compatible with the MC68020, MC68030, and Earlier M68000 Microprocessors  
• Burst-Mode Bus Interface for Efficient DRAM Access  
• On-Chip Data Cache (256 Bytes) and On-Chip Instruction Cache (256 Byte)  
• Dynamic Bus Sizing for Direct Interface to 8-, 16-, and 32-Bit Devices  
• 25- and 40-MHz Operating Frequency (up to 9.2 MIPS)  
• Advanced Plastic Pin Grid Array Packaging for Through-Hole Applications  
Additional features of the MC68EC030 include:  
• Complete 32-Bit Nonmultiplexed Address and Data Buses  
• Sixteen 32-Bit General-Purpose Data and Address Registers  
• Two 32-Bit Supervisor Stack Pointers and Eight Special-Purpose Control Registers  
• Two Access Control Registers Allow Blocks To Be Defined for Cacheability Protection  
• Pipelined Architecture with Increased Parallelism Allows:  
– Internal Caches Accesses in Parallel with Bus Transfers  
– Overlapped Instruction Execution  
• Enhanced Bus Controller Supports Asynchronous Bus Cycles (three clocks minimum),  
Synchronous Bus Cycle (two clocks minimum), and Burst Data Transfers (one clock)  
• Complete Support for Coprocessors with the M68000 Coprocessor Interface  
• Internal Status Indication for Hardware Emulation Support  
• 4-Gbyte Direct Addressing Range  
• Implemented in Motorola's HCMOS Technology That Allows CMOS and HMOS (High-Density  
NMOS) Gates To Be Combined for Maximum Speed, Low Power, and Small Die Size  
This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.  
©MOTOROLA INC., 1991  
µ MOTOROLA  
Rev. 1  
For More Information On This Product,  
Go to: www.freescale.com  

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