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MC68EC030FE25CB1 PDF预览

MC68EC030FE25CB1

更新时间： 2024-10-01 19:52:43
品牌 Logo 应用领域
恩智浦 - NXP 时钟外围集成电路
页数 文件大小 规格书
44页 499K
描述
32-BIT, 25MHz, MICROPROCESSOR, CQFP132, LEAD FREE, CERAMIC, QFP-132

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MC68EC030FE25CB1 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：QFP包装说明：QFP,
针数：132Reach Compliance Code：compliant
ECCN代码：EAR99HTS代码：8542.31.00.01
风险等级：5.52地址总线宽度：32
位大小：32边界扫描：NO
最大时钟频率：25 MHz外部数据总线宽度：32
格式：FIXED POINT集成缓存：YES
JESD-30 代码：S-CQFP-G132JESD-609代码：e3
长度：24.13 mm低功率模式：NO
湿度敏感等级：1端子数量：132
最高工作温度：70 °C最低工作温度：
封装主体材料：CERAMIC, METAL-SEALED COFIRED封装代码：QFP
封装形状：SQUARE封装形式：FLATPACK
峰值回流温度（摄氏度）：260认证状态：Not Qualified
座面最大高度：3.175 mm速度：25 MHz
最大供电电压：5.25 V最小供电电压：4.75 V
标称供电电压：5 V表面贴装：YES
技术：HCMOS温度等级：COMMERCIAL
端子面层：Matte Tin (Sn)端子形式：GULL WING
端子节距：0.635 mm端子位置：QUAD
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：24.13 mm
uPs/uCs/外围集成电路类型：MICROPROCESSORBase Number Matches：1

MC68EC030FE25CB1 数据手册

 浏览型号MC68EC030FE25CB1的Datasheet PDF文件第2页浏览型号MC68EC030FE25CB1的Datasheet PDF文件第3页浏览型号MC68EC030FE25CB1的Datasheet PDF文件第4页浏览型号MC68EC030FE25CB1的Datasheet PDF文件第5页浏览型号MC68EC030FE25CB1的Datasheet PDF文件第6页浏览型号MC68EC030FE25CB1的Datasheet PDF文件第7页 
Freescale Semiconductor, Inc.  
Order this document  
by MC68EC030/D  
MOTOROLA  
SEMICONDUCTOR  
TECHNICAL DATA  
MC68EC030  
Technical Summary  
Second-Generation 32-Bit Enhanced Embedded  
Controller  
The MC68EC030 is a 32-bit embedded controller that streamlines the functionality of an MC68030 for  
the requirements of embedded control applications. The MC68EC030 is optimized to maintain  
performance while using cost-effective memory subsystems. The rich instruction set and addressing  
mode capabilities of the MC68020, MC68030, and MC68040 have been maintained, allowing a clear  
migration path for M68000 systems. The main features of the MC68EC030 are as follows:  
• Object-Code Compatible with the MC68020, MC68030, and Earlier M68000 Microprocessors  
• Burst-Mode Bus Interface for Efficient DRAM Access  
• On-Chip Data Cache (256 Bytes) and On-Chip Instruction Cache (256 Byte)  
• Dynamic Bus Sizing for Direct Interface to 8-, 16-, and 32-Bit Devices  
• 25- and 40-MHz Operating Frequency (up to 9.2 MIPS)  
• Advanced Plastic Pin Grid Array Packaging for Through-Hole Applications  
Additional features of the MC68EC030 include:  
• Complete 32-Bit Nonmultiplexed Address and Data Buses  
• Sixteen 32-Bit General-Purpose Data and Address Registers  
• Two 32-Bit Supervisor Stack Pointers and Eight Special-Purpose Control Registers  
• Two Access Control Registers Allow Blocks To Be Defined for Cacheability Protection  
• Pipelined Architecture with Increased Parallelism Allows:  
– Internal Caches Accesses in Parallel with Bus Transfers  
– Overlapped Instruction Execution  
• Enhanced Bus Controller Supports Asynchronous Bus Cycles (three clocks minimum),  
Synchronous Bus Cycle (two clocks minimum), and Burst Data Transfers (one clock)  
• Complete Support for Coprocessors with the M68000 Coprocessor Interface  
• Internal Status Indication for Hardware Emulation Support  
• 4-Gbyte Direct Addressing Range  
• Implemented in Motorola's HCMOS Technology That Allows CMOS and HMOS (High-Density  
NMOS) Gates To Be Combined for Maximum Speed, Low Power, and Small Die Size  
This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.  
©MOTOROLA INC., 1991  
µ MOTOROLA  
Rev. 1  
For More Information On This Product,  
Go to: www.freescale.com  
1234567...44

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