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MC14585BCLS PDF预览

MC14585BCLS

更新时间: 2024-11-02 13:11:15
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 比较器运算电路逻辑集成电路
页数 文件大小 规格书
6页 189K
描述
Magnitude Comparator, CMOS, CDIP16

MC14585BCLS 技术参数

是否Rohs认证:不符合生命周期:Obsolete
Reach Compliance Code:unknown风险等级:5.92
Is Samacsys:NJESD-30 代码:R-XDIP-T16
JESD-609代码:e0逻辑集成电路类型:MAGNITUDE COMPARATOR
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:CERAMIC
封装代码:DIP封装等效代码:DIP16,.3
封装形状:RECTANGULAR封装形式:IN-LINE
电源:5/15 V认证状态:Not Qualified
子类别:Arithmetic Circuits表面贴装:NO
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
Base Number Matches:1

MC14585BCLS 数据手册

 浏览型号MC14585BCLS的Datasheet PDF文件第2页浏览型号MC14585BCLS的Datasheet PDF文件第3页浏览型号MC14585BCLS的Datasheet PDF文件第4页浏览型号MC14585BCLS的Datasheet PDF文件第5页浏览型号MC14585BCLS的Datasheet PDF文件第6页 
SEMICONDUCTOR TECHNICAL DATA  
The MC14585B 4–Bit Magnitude Comparator is constructed with comple-  
mentary MOS (CMOS) enhancement mode devices. The circuit has eight  
comparing inputs (A3, B3, A2, B2, A1, B1, A0, B0), three cascading inputs  
(A < B, A = B, and A > B), and three outputs (A < B, A = B, and A > B). This  
device compares two 4–bit words (A and B) and determines whether they  
are “less than”, “equal to”, or “greater than” by a high level on the appropriate  
output. For words greater than 4–bits, units can be cascaded by connecting  
outputs (A > B), (A < B), and (A = B) to the corresponding inputs of the next  
significant comparator. Inputs (A < B), (A = B), and (A > B) on the least  
significant (first) comparator are connected to a low, a high, and a low,  
respectively.  
L SUFFIX  
CERAMIC  
CASE 620  
P SUFFIX  
PLASTIC  
CASE 648  
D SUFFIX  
SOIC  
CASE 751B  
Applications include logic in CPU’s, correction and/or detection of  
instrumentation conditions, comparator in testers, converters, and controls.  
Diode Protection on All Inputs  
Expandable  
ORDERING INFORMATION  
MC14XXXBCP  
MC14XXXBCL  
MC14XXXBD  
Plastic  
Ceramic  
SOIC  
Applicable to Binary or 8421–BCD Code  
Supply Voltage Range = 3.0 Vdc to 18 Vdc  
Capable of Driving Two Low–power TTL Loads or One Low–power  
Schottky TTL Load over the Rated Temperature Range  
Can be Cascaded – See Fig. 3  
T
= – 55° to 125°C for all packages.  
A
MAXIMUM RATINGS* (Voltages Referenced to V  
)
BLOCK DIAGRAM  
SS  
Symbol  
Parameter  
DC Supply Voltage  
Value  
Unit  
V
(A > B)  
in  
4
6
V
DD  
– 0.5 to + 18.0  
(A = B)  
(A < B)  
A0  
in  
in  
V , V  
Input or Output Voltage (DC or Transient)  
– 0.5 to V  
DD  
+ 0.5  
V
(A > B)  
(A = B)  
(A < B)  
13  
3
5
in out  
out  
out  
out  
10  
11  
7
I , I  
in out  
Input or Output Current (DC or Transient),  
per Pin  
± 10  
mA  
B0  
A1  
P
D
Power Dissipation, per Package†  
Storage Temperature  
500  
– 65 to + 150  
260  
mW  
C
B1  
9
A2  
2
T
stg  
B2  
12  
1
T
L
Lead Temperature (8–Second Soldering)  
C
A3  
15  
14  
* Maximum Ratings are those values beyond which damage to the device may occur.  
Temperature Derating:  
B3  
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C  
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C  
V
V
= PIN 16  
= PIN 8  
DD  
SS  
TRUTH TABLE (x = Don’t Care)  
Inputs  
Outputs  
A0, B0 A < B A = B A > B A < B A = B A > B  
Comparing  
A2, B2 A1, B1  
Cascading  
A3, B3  
A3 > B3  
A3 = B3 A2 > B2  
A3 = B3 A2 = B2 A1 > B1  
A3 = B3 A2 = B2 A1 = B1 A0 > B0  
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
0
0
0
0
0
0
0
0
1
1
1
1
A3 = B3 A2 = B2 A1 = B1 A0 = B0  
A3 = B3 A2 = B2 A1 = B1 A0 = B0  
A3 = B3 A2 = B2 A1 = B1 A0 = B0  
A3 = B3 A2 = B2 A1 = B1 A0 = B0  
0
0
1
1
0
1
0
1
x
x
x
x
0
0
1
1
0
1
0
1
1
0
0
0
A3 = B3 A2 = B2 A1 = B1 A0 < B0  
x
x
x
x
x
x
x
x
x
1
1
1
0
0
0
0
0
0
A3 = B3 A2 = B2 A1 < B1  
x
x
A3 = B3 A2 < B2  
A3 < B3  
x
x
x
x
x
x
x
1
0
0
REV 3  
1/94  
Motorola, Inc. 1995  

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