The MC14585B 4–Bit Magnitude Comparator is constructed with
complementary MOS (CMOS) enhancement mode devices. The
circuit has eight comparing inputs (A3, B3, A2, B2, A1, B1, A0, B0),
three cascading inputs (A< B, A = B, and A > B), and three outputs (A
< B, A = B, and A > B). This device compares two 4–bit words (A and
B) and determines whether they are “less than”, “equal to”, or “greater
than” by a high level on the appropriate output. For words greater than
4–bits, units can be cascaded by connecting outputs (A > B), (A < B),
and (A = B) to the corresponding inputs of the next significant
comparator. Inputs (A < B), (A = B), and (A > B) on the least
significant (first) comparator are connected to a low, a high, and a low,
respectively.
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MARKING
DIAGRAMS
16
PDIP–16
P SUFFIX
CASE 648
MC14585BCP
AWLYYWW
1
16
Applications include logic in CPU’s, correction and/or detection of
instrumentation conditions, comparator in testers, converters, and
controls.
SOIC–16
D SUFFIX
CASE 751B
14585B
AWLYWW
• Diode Protection on All Inputs
• Expandable
1
16
SOEIAJ–16
F SUFFIX
CASE 966
• Applicable to Binary or 8421–BCD Code
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
MC14585B
AWLYWW
• Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load over the Rated Temperature Range
• Can be Cascaded – See Fig. 3
1
A
= Assembly Location
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week
MAXIMUM RATINGS (Voltages Referenced to V ) (Note 2.)
SS
Symbol
Parameter
Value
Unit
V
V
DD
DC Supply Voltage Range
–0.5 to +18.0
ORDERING INFORMATION
V , V
Input or Output Voltage Range
(DC or Transient)
–0.5 to V + 0.5
V
in out
DD
Device
Package
PDIP–16
SOIC–16
Shipping
MC14585BCP
MC14585BD
2000/Box
48/Rail
I , I
in out
Input or Output Current
(DC or Transient) per Pin
±10
mA
P
Power Dissipation,
per Package (Note 3.)
500
mW
D
MC14585BDR2
SOIC–16 2500/Tape & Reel
SOEIAJ–16 See Note 1.
T
A
Ambient Temperature Range
Storage Temperature Range
–55 to +125
–65 to +150
260
°C
°C
°C
MC14585BF
T
stg
1. For ordering information on the EIAJ version of
the SOIC packages, please contact your local
ON Semiconductor representative.
T
Lead Temperature
(8–Second Soldering)
L
2. Maximum Ratings are those values beyond which damage to the device
may occur.
3. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high–impedancecircuit. For proper operation, V and V should be constrained
in
out
to the range V
(V or V
)
V
DD
.
SS
in
out
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either V or V ). Unused outputs must be left open.
SS
DD
Semiconductor Components Industries, LLC, 2000
1
Publication Order Number:
March, 2000 – Rev. 3
MC14585B/D