MC14549B, MC14559B
Successive Approximation
Registers
The MC14549B and MC14559B successive approximation
registers are 8–bit registers providing all the digital control and storage
necessary for successive approximation analog–to–digital conversion
systems. These parts differ in only one control input. The Master Reset
(MR) on the MC14549B is required in the cascaded mode when more
than 8 bits are desired. The Feed Forward (FF) of the MC14559B is
used for register shortening where End–of–Conversion (EOC) is
required after less than eight cycles.
http://onsemi.com
MARKING
DIAGRAMS
16
Applications for the MC14549B and MC14559B include
analog–to–digital conversion, with serial and parallel outputs.
PDIP–16
P SUFFIX
CASE 648
MC145xxBCP
AWLYYWW
• Totally Synchronous Operation
• All Outputs Buffered
• Single Supply Operation
• Serial Output
1
16
• Retriggerable
• Compatible with a Variety of Digital and Analog Systems such as the
MC1408 8–Bit D/A Converter
145xxB
SOIC–16
DW SUFFIX
CASE 751G
• All Control Inputs Positive–Edge Triggered
AWLYYWW
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
1
• Capable of Driving 2 Low–Power TTL Loads, 1 Low–Power Schottky
TTL Load or 2 HTL Loads Over the Rated Temperature Range
• Chip Complexity: 488 FETs or 122 Equivalent Gates
xx
A
WL, L
YY, Y
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
WW, W = Work Week
MAXIMUM RATINGS (Voltages Referenced to V ) (Note 1.)
SS
Symbol
Parameter
Value
Unit
V
V
DD
DC Supply Voltage Range
Input Voltage Range, All Inputs
DC Input Current, per Pin
–0.5 to +18.0
ORDERING INFORMATION
V
in
–0.5 to V + 0.5
V
DD
Device
Package
Shipping
25/Rail
I
in
±10
mA
mW
P
D
Power Dissipation,
500
MC14549BCP
PDIP–16
per Package (Note 2.)
MC14549BDWR2
MC14559BCP
SOIC–16 1000/Tape & Reel
PDIP–16 25/Rail
T
Operating Temperature Range
Storage Temperature Range
–55 to +125
–65 to +150
°C
°C
A
T
stg
MC14559BDWR2
SOIC–16 1000/Tape & Reel
1. Maximum Ratings are those values beyond which damage to the device
may occur.
2. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high–impedance circuit. For proper operation, V and V should be constrained
in
out
to the range V v (V or V ) v V
.
SS
in
out
DD
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either V or V ).
SS
DD
Semiconductor Components Industries, LLC, 2000
1
Publication Order Number:
August, 2000 – Rev. 4
MC14549B/D