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MC1455 PDF预览

MC1455

更新时间: 2024-11-26 22:03:35
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
10页 151K
描述
Timing Circuit

MC1455 数据手册

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MC1455, MC1455B,  
NCV1455B  
Timers  
The MC1455 monolithic timing circuit is a highly stable controller  
capable of producing accurate time delays or oscillation. Additional  
terminals are provided for triggering or resetting if desired. In the time  
delay mode, time is precisely controlled by one external resistor and  
capacitor. For astable operation as an oscillator, the free−running  
frequency and the duty cycle are both accurately controlled with two  
external resistors and one capacitor. The circuit may be triggered and  
reset on falling waveforms, and the output structure can source or sink  
up to 200 mA or drive MTTL circuits.  
Direct Replacement for NE555 Timers  
Timing from Microseconds through Hours  
Operates in Both Astable and Monostable Modes  
Adjustable Duty Cycle  
http://onsemi.com  
MARKING  
DIAGRAMS  
XXXXXXXXX  
AWL  
8
YYWW  
1
P1 SUFFIX  
PLASTIC PACKAGE  
CASE 626  
High Current Output Can Source or Sink 200 mA  
Output Can Drive MTTL  
Temperature Stability of 0.005% per °C  
Normally ON or Normally OFF Output  
8
8
XXXXXX  
ALYW  
1
D SUFFIX  
PLASTIC PACKAGE  
CASE 751  
1
xx  
A
= Specific Device Code  
= Assembly Location  
WL, L = Wafer Lot  
YY, Y = Year  
WW, W = Work Week  
1.0 k  
Load  
MT2  
3
8
MT1  
6
7
G
4
2
R
20ꢀM  
C
10 k  
MC1455  
ORDERING INFORMATION  
5
See detailed ordering and shipping information in the package  
dimensions section on page ___ of this data sheet.  
(Create − Named − OrderingInfoText.)  
0.01 mF  
1.0 mF  
0.1 mF  
1
1N4003  
−10 V  
3.5 k  
10 mF  
1N4740  
t = 1.1; R and C = 22 sec  
Time delay (t) is variable by  
changing R and C (see Figure 16).  
+
250 V  
Figure 1. 22 Second Solid State Time Delay Relay Circuit  
V
CC  
I
CC  
V
R
Reset  
4
8
700  
7
5
V
CC  
V
CC  
+
Control  
Voltage  
0.01 mF  
Discharge  
8
MC1455  
3
5 k  
Threshold  
6
7
3
6
5
V
S
Discharge  
Output  
+
Threshold  
2.0 k  
Output  
I
th  
Comp  
A
Flip  
Flop  
Gnd  
1
Trigger  
I
Sink  
V
O
R
S
Control Voltage  
2
I
Source  
Q
5 k  
5 k  
Inhibit/  
Reset  
+
Comp  
B
2
Trigger  
Test circuit for measuring DC parameters (to set output and  
measure parameters):  
a) When V w 2/3 V , V is low.  
S
CC  
O
b) When V v 1/3 V , V is high.  
S
CC  
O
1
4
c) When V is low, Pin 7 sinks current. To test for Reset, set V  
O
O
Gnd  
Reset  
c) high, apply Reset voltage, and test for current flowing into Pin 7.  
c) When Reset is not in use, it should be tied to V  
.
CC  
Figure 2. Representative Block Diagram  
Figure 3. General Test Circuit  
Semiconductor Components Industries, LLC, 2004  
1
Publication Order Number:  
MC1455/D  
March, 2004 − Rev. 8  

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