Datasheet > MC145484SD

MC145484SD

更新时间： 2024-11-24 21:16:27

品牌	Logo	应用领域
恩智浦 - NXP		PC 电信光电二极管电信集成电路
页数	文件大小	规格书
28页	454K
描述
A/MU-LAW, PCM CODEC, PDSO20, SSOP-20

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MC145484SD 技术参数

是否Rohs认证：	不符合	生命周期：	Transferred
零件包装代码：	SSOP	包装说明：	SSOP, SSOP20,.3
针数：	20	Reach Compliance Code：	not_compliant
ECCN代码：	EAR99	HTS代码：	8542.31.00.01
风险等级：	5.06	压伸定律：	A/MU-LAW
滤波器：	YES	最大增益公差：	0.25 dB
JESD-30 代码：	R-PDSO-G20	JESD-609代码：	e0
长度：	7.2 mm	线性编码：	NOT AVAILABLE
湿度敏感等级：	1	功能数量：	1
端子数量：	20	工作模式：	SYNCHRONOUS/ASYNCHRONOUS
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	SSOP
封装等效代码：	SSOP20,.3	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, SHRINK PITCH	峰值回流温度（摄氏度）：	220
电源：	5 V	认证状态：	Not Qualified
座面最大高度：	1.99 mm	子类别：	Codecs
最大压摆率：	0.005 mA	标称供电电压：	5 V
表面贴装：	YES	技术：	CMOS
电信集成电路类型：	PCM CODEC	温度等级：	INDUSTRIAL
端子面层：	Tin/Lead (Sn/Pb)	端子形式：	GULL WING
端子节距：	0.65 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	30	宽度：	5.29 mm
Base Number Matches：	1

MC145484SD 数据手册

Freescale Semiconductor, Inc.

SEMICONDUCTOR TECHNICAL DATA

Order this document

by MC145484/D

The MC145484 is a general purpose per channel PCM Codec–Filter with pin

selectable Mu–Law or A–Law companding, and is offered in 20–pin SOG,

SSOP, and TSSOP packages. This device performs the voice digitization and

reconstruction as well as the band limiting and smoothing required for PCM

systems. This device is designed to operate in both synchronous and

asynchronous applications and contains an on–chip precision reference

voltage.

DW SUFFIX

SOG PACKAGE

CASE 751D

SD SUFFIX

SSOP

This device has an input operational amplifier whose output is the input to the

encoder section. The encoder section immediately low–pass filters the analog

signal with an active R–C filter to eliminate very high frequency noise from being

modulated down to the passband by the switched capacitor filter. From the

active R–C filter, the analog signal is converted to a differential signal. From this

point, all analog signal processing is done differentially. This allows processing

of an analog signal that is twice the amplitude allowed by a single–ended

design, which reduces the significance of noise to both the inverted and

non–inverted signal paths. Another advantage of this differential design is that

noise injected via the power supplies is a common–mode signal that is

cancelled when the inverted and non–inverted signals are recombined. This

dramatically improves the power supply rejection ratio.

CASE 940C

DT SUFFIX

TSSOP

CASE 948E

ORDERING INFORMATION

MC145484DW

MC145484SD

MC145484DT

SOG Package

SSOP

TSSOP

After the differential converter, a differential switched capacitor filter band–

passes the analog signal from 200 Hz to 3400 Hz before the signal is digitized

by the differential compressing A/D converter.

The decoder accepts PCM data and expands it using a differential D/A

converter. The output of the D/A is low–pass filtered at 3400 Hz and sinX/X

compensated by a differential switched capacitor filter. The signal is then filtered

by an active R–C filter to eliminate the out–of–band energy of the switched

capacitor filter.

PIN ASSIGNMENT

The MC145484 PCM Codec–Filter has a high impedance V

reference pin

which allows for decoupling of the internal circuitry that generates the

mid–supply V reference voltage, to the V power supply ground. This

reduces clock noise on the analog circuitry when external analog signals are

referenced to the power supply ground. This device is optimal for electronic

SLIC interfaces.

The MC145484 PCM Codec–Filter accepts a variety of clock formats,

including Short Frame Sync, Long Frame Sync, IDL, and GCI timing

environments. This device also maintains compatibility with Motorola’s family

of Telecommunication products, including the MC14LC5472 and MC145572

U–Interface Transceivers, MC145474/75 and MC145574 S/T–Interface Trans-

ceivers, MC145532 ADPCM Transcoder, MC145422/26 UDLT–1,

MC145421/25 UDLT–2, and MC3419/MC33120 SLICs.

The MC145484 PCM Codec–Filter utilizes CMOS due to its reliable

low–power performance and proven capability for complex analog/digital VLSI

functions.

•

Single 5 V Power Supply

Typical Power Dissipation of 15 mW, Power–Down of 0.01 mW

Fully–Differential Analog Circuit Design for Lowest Noise

Transmit Band–Pass and Receive Low–Pass Filters On–Chip

Active R–C Pre–Filtering and Post–Filtering

Mu–Law and A–Law Companding by Pin Selection

On–Chip Precision Reference Voltage of 1.575 V for a – 0 dBm TLP @ 600 Ω

Push–Pull 300 Ω Power Drivers with External Gain Adjust

MC14LC5480EVK is the Evaluation Kit for This Device

REV 2

3/98

TN98031100

Motorola, Inc. 1998

MOTOROLA

MC145484

For More Information On This Product,

Go to: www.freescale.com

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与MC145484SD相关器件

型号	品牌	获取价格	描述	数据表
MC145484SDR2	MOTOROLA	获取价格	A/MU-LAW, PCM CODEC, PDSO20, SSOP-20
MC145488	MOTOROLA	获取价格	LOW-VOLTAGE CMOS OCTAL TRANSCEIVER
MC145488FN	MOTOROLA	获取价格	LOW-VOLTAGE CMOS OCTAL TRANSCEIVER
MC145488FNR2	MOTOROLA	获取价格	SPECIALTY TELECOM CIRCUIT, PQCC68, 779
MC14549	ONSEMI	获取价格	Successive Approximation Registers
MC14549B	ONSEMI	获取价格	Successive Approximation Registers
MC14549B	MOTOROLA	获取价格	SUCCESSIVE APPROXIMATION REGISTERS
MC14549B_06	ONSEMI	获取价格	Successive Approximation Registers
MC14549BALD	MOTOROLA	获取价格	暂无描述
MC14549BALDS	MOTOROLA	获取价格	SPECIALTY LOGIC CIRCUIT, CDIP16, 620-09

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